diff --git a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino index 2d0de4ea..cd31da2b 100644 --- a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino +++ b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino @@ -21,7 +21,6 @@ // If you set useSpiAlternatePins true, then these pins will be used instead. Any output-capable GPIO can be used. const uint8_t DotClockPin = 18; const uint8_t DotDataPin = 23; - const uint8_t MisoUnusedPin = -1; const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false // for software bit bang (only use if neither SPI peripheral is available) @@ -77,7 +76,7 @@ void setup() #if (USE_DEFAULT_SPI_PORT == 1) if (useSpiAlternatePins) { - strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin); + strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin); } else { @@ -91,7 +90,7 @@ void setup() #if (USE_ALTERNATE_SPI_PORT == 1) if (useSpiAlternatePins2) { - strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2); + strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2); } else { diff --git a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino index b370d88c..41ffdbac 100644 --- a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino +++ b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino @@ -38,7 +38,6 @@ // If you set useSpiAlternatePins true, then these pins will be used instead. Any output-capable GPIO can be used. const uint8_t DotClockPin = 18; const uint8_t DotDataPin = 23; - const uint8_t MisoUnusedPin = -1; const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false // for software bit bang (only use if neither SPI peripheral is available) @@ -90,7 +89,7 @@ void setup() #if (USE_DEFAULT_SPI_PORT == 1) if (useSpiAlternatePins) { - strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin); + strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin); } else { @@ -104,7 +103,7 @@ void setup() #if (USE_ALTERNATE_SPI_PORT == 1) if (useSpiAlternatePins2) { - strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2); + strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2); } else { diff --git a/src/internal/NeoMethods.h b/src/internal/NeoMethods.h index 19fcaf3b..0cce59b9 100644 --- a/src/internal/NeoMethods.h +++ b/src/internal/NeoMethods.h @@ -74,7 +74,7 @@ License along with NeoPixel. If not, see #endif // ESP_IDF_VERSION_MAJOR < 5 // once we have a core3 i2s, then fix this -#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) +#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h" #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h" #endif diff --git a/src/internal/XMethods.h b/src/internal/XMethods.h index 48ba7b4a..0a45d972 100644 --- a/src/internal/XMethods.h +++ b/src/internal/XMethods.h @@ -69,7 +69,7 @@ typedef NeoEsp32LcdX16Ws2812Method X16Ws2812Method; typedef NeoEsp32LcdX16Lc8812Method X16Lc8812Method; -#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) +#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) //---------------------------------------------------------- typedef NeoEsp32RmtXWs2812xMethod XWs2812xMethod; diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c index 6b8281d5..87f46256 100644 --- a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c +++ b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c @@ -22,8 +22,8 @@ #include #include "stdlib.h" -// ESP32 C3, S3, C6, H2, and P4 I2S is not supported yet due to significant changes to interface -#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) +// ESP32 C3, S3, C5, C6, H2, and P4 I2S is not supported yet due to significant changes to interface +#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -516,7 +516,9 @@ void i2sInit(uint8_t bus_num, // conf1.rx_pcm_bypass = 1; conf1.tx_stop_en = 0; -#if SOC_I2S_SUPPORTS_PCM_BYPASS +#if defined(CONFIG_IDF_TARGET_ESP32S2) + conf1.reserved0 = 0; +#else conf1.tx_pcm_bypass = 1; #endif i2s->conf1.val = conf1.val; @@ -952,6 +954,6 @@ bool i2sGetClks(uint8_t bus_num, } #endif -#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) +#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) #endif // defined(ARDUINO_ARCH_ESP32) diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h index fb9021c8..a3c181f6 100644 --- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h +++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h @@ -28,7 +28,7 @@ License along with NeoPixel. If not, see // ESP32 beyond C3 & S3 I2S is not supported yet // due to significant changes to interface -#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) +#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) extern "C" diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h index f099620c..35934e96 100644 --- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h +++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h @@ -28,7 +28,7 @@ License along with NeoPixel. If not, see // ESP32 beyond C3 & S3 I2S is not supported yet // due to significant changes to interface -#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) +#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4) extern "C" { diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp index 32b2fce0..687c3bf6 100644 --- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp +++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp @@ -31,10 +31,10 @@ License along with NeoPixel. If not, see #if ESP_IDF_VERSION_MAJOR < 5 -#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) +#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) -#include "../../../../NeoSettings.h" -#include "../../../../NeoBusChannel.h" +#include "../../../NeoSettings.h" +#include "../../../NeoBusChannel.h" #include "NeoEsp32RmtMethod.h" // translate NeoPixelBuffer into RMT buffer diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h index b224331c..d6d1f571 100644 --- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h +++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h @@ -437,13 +437,7 @@ class NeoEspLcdMonoBuffContext .sibling_chan = NULL, .direction = GDMA_CHANNEL_DIRECTION_TX, .flags = {.reserve_sibling = 0}}; -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 - gdma_new_ahb_channel(&dma_chan_config, &_dmaChannel); -#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 - gdma_new_axi_channel(&dma_chan_config, &_dmaChannel); -#else gdma_new_channel(&dma_chan_config, &_dmaChannel); -#endif gdma_connect(_dmaChannel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_LCD, 0)); gdma_strategy_config_t strategy_config = {.owner_check = false, .auto_update_desc = false}; @@ -552,7 +546,11 @@ class NeoEsp32LcdMuxBus uint8_t muxIdx = LCD_DATA_OUT0_IDX + _muxId; esp_rom_gpio_connect_out_signal(pin, muxIdx, invert, false); - PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO); + #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 5, 0) + gpio_iomux_out(pin, PIN_FUNC_GPIO, false); + #else + gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO); + #endif gpio_set_drive_capability((gpio_num_t)pin, (gpio_drive_cap_t)3); } diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h index 326c5dfa..72a2415d 100644 --- a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h +++ b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h @@ -28,6 +28,10 @@ License along with NeoPixel. If not, see #if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C2) +// Needed for ESP_* macros that take a log_tag +#include "esp_log.h" +static const char* TAG = "NeoEsp32RmtX"; + #include #include "NeoEsp32RmtSpeed.h" @@ -41,8 +45,6 @@ extern "C" #include "esp_check.h" } -static const char *TAG = "led_strip_rmt"; // TODO: Remove all TAG log stuff - struct led_strip_encoder_config_t { uint32_t resolution; /*!< Encoder resolution, in Hz */ @@ -57,9 +59,6 @@ struct rmt_led_strip_encoder_t rmt_symbol_word_t reset_code; }; -#define NEOPIXELBUS_RMT_INT_FLAGS (ESP_INTR_FLAG_LOWMED) - - template class NeoEsp32RmtMethodBase { public: @@ -101,11 +100,19 @@ template class N rmt_tx_channel_config_t config = {}; config.clk_src = RMT_CLK_SRC_DEFAULT; config.gpio_num = static_cast(_pin); - config.mem_block_symbols = 192; // memory block size, 64 * 4 = 256 Bytes +#if SOC_RMT_SUPPORT_DMA + config.mem_block_symbols = 512; // DMA decouples the buffer from RMT memory, so this is just a sane DMA buffer size +#else + config.mem_block_symbols = SOC_RMT_TX_CANDIDATES_PER_GROUP * SOC_RMT_MEM_WORDS_PER_CHANNEL; // max symbols a single TX channel can borrow from all TX-capable channels in its group: 512 on original ESP32 (8x64), 96 on ESP32-C3 (2x48). Requesting more than this fails rmt_new_tx_channel with "no free tx channels" since there is no contiguous free memory to satisfy it. A bigger half-buffer gives the RMT ISR more slack against BLE-induced preemption before the WS2811/WS2812x 300 µs reset threshold is hit, so we ask for the most each chip can give. +#endif config.resolution_hz = T_SPEED::RmtTicksPerSecond; // 1 MHz tick resolution, i.e., 1 tick = 1 µs config.trans_queue_depth = 4; // set the number of transactions that can pend in the background config.flags.invert_out = T_INVERTED::Inverted; // do not invert output signal - config.flags.with_dma = false; // do not need DMA backend +#if SOC_RMT_SUPPORT_DMA + config.flags.with_dma = true; // chips with small per-channel RMT memory (e.g. ESP32-S3: 48 words/channel) can't fit a large static block; DMA decouples the buffer from RMT memory and from ISR refill timing entirely +#else + config.flags.with_dma = false; // chips without DMA support (original ESP32, ESP32-C3) use the static block sized above +#endif ret += rmt_new_tx_channel(&config, &_channel); led_strip_encoder_config_t encoder_config = {}; @@ -281,7 +288,7 @@ template class N bytes_encoder_config.bit1.val = bit1; bytes_encoder_config.flags.msb_first = 1; // WS2812 transfer bit order: G7...G0R7...R0B7...B0 - TODO: more checks -\ + ESP_GOTO_ON_ERROR(rmt_new_bytes_encoder(&bytes_encoder_config, &led_encoder->bytes_encoder), err, "TEST_RMT", "create bytes encoder failed"); ESP_GOTO_ON_ERROR(rmt_new_copy_encoder(©_encoder_config, &led_encoder->copy_encoder), err, "TEST_RMT", "create copy encoder failed"); @@ -357,7 +364,7 @@ typedef NeoEsp32RmtMethodBase NeoEs typedef NeoEsp32RmtMethodBase NeoEsp32RmtX800KbpsInvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32RmtX400KbpsInvertedMethod; -#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32S3) +#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32S3) // Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT // will switch to use RMT as the default method @@ -392,6 +399,6 @@ typedef NeoEsp32RmtXWs2812xInvertedMethod Neo800KbpsInvertedMethod; typedef NeoEsp32RmtX400KbpsInvertedMethod Neo400KbpsInvertedMethod; -#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) +#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) #endif diff --git a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp index 2deeefe2..09ad953f 100644 --- a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp +++ b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp @@ -36,7 +36,9 @@ static inline uint32_t getCycleCount(void) { uint32_t ccount; -#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) +#if defined(CONFIG_IDF_TARGET_ESP32C5) + __asm__ __volatile__("csrr %0,0xC00":"=r" (ccount)); // standard RISC-V cycle counter +#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) __asm__ __volatile__("csrr %0,0x7e2":"=r" (ccount)); //ccount = esp_cpu_get_ccount(); #else @@ -46,8 +48,7 @@ static inline uint32_t getCycleCount(void) } // Interrupt lock class, used for RAII interrupt disabling -class InterruptLock -{ +class InterruptLock { #if defined(ARDUINO_ARCH_ESP32) portMUX_TYPE updateMux; #endif @@ -62,7 +63,7 @@ class InterruptLock } inline void unlock() - { + { #if defined(ARDUINO_ARCH_ESP32) portEXIT_CRITICAL(&updateMux); #else @@ -77,12 +78,12 @@ class InterruptLock unlock(); lock(); } - + inline InterruptLock() #if defined(ARDUINO_ARCH_ESP32) : updateMux(portMUX_INITIALIZER_UNLOCKED) #endif - { + { lock(); } @@ -115,13 +116,13 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels, volatile uint32_t* setRegister; volatile uint32_t* clearRegister; -#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) +#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4) if (pin < 32) { setRegister = &GPIO.out_w1ts.val; clearRegister = &GPIO.out_w1tc.val; } -#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H2) +#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) else { setRegister = &GPIO.out1_w1ts.val; @@ -139,7 +140,7 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels, setRegister = &GPIO.out1_w1ts.val; clearRegister = &GPIO.out1_w1tc.val; } -#endif // defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) +#endif // defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) #else // just ESP8266 uint32_t setRegister = PERIPHS_GPIO_BASEADDR + GPIO_OUT_W1TS_ADDRESS; diff --git a/src/internal/methods/ESP/NeoEspBitBangMethod.h b/src/internal/methods/ESP/NeoEspBitBangMethod.h index 01acd5d5..55ce0f94 100644 --- a/src/internal/methods/ESP/NeoEspBitBangMethod.h +++ b/src/internal/methods/ESP/NeoEspBitBangMethod.h @@ -28,6 +28,8 @@ License along with NeoPixel. If not, see #if defined(ARDUINO_ARCH_ESP8266) || defined(ARDUINO_ARCH_ESP32) +#include "../../NeoBusChannel.h" // for NeoBusChannel enum (used by channel-aware constructor overload) + #if defined(ARDUINO_ARCH_ESP8266) #include #endif @@ -204,6 +206,12 @@ template class Ne // data cleared later in Begin() } + // overload: accept and ignore channel parameter (for RMT-to-BitBang substitution) + NeoEspBitBangMethodBase(uint8_t pin, uint16_t pixelCount, size_t elementSize, size_t settingsSize, NeoBusChannel) : + NeoEspBitBangMethodBase(pin, pixelCount, elementSize, settingsSize) + { + } + ~NeoEspBitBangMethodBase() { pinMode(_pin, INPUT); diff --git a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h index 5fbb12ad..d51323b6 100644 --- a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h +++ b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h @@ -50,28 +50,12 @@ class NeoRp2040PioInstance1 const PIO Instance; }; -#if NUM_PIOS == 3 -class NeoRp2040PioInstance2 -{ -public: - NeoRp2040PioInstance2() : - Instance(pio2) - {}; - - const PIO Instance; -}; -#endif - // dynamic channel support class NeoRp2040PioInstanceN { public: NeoRp2040PioInstanceN(NeoBusChannel channel) : -#if NUM_PIOS == 2 Instance(channel == NeoBusChannel_0 ? pio0 : pio1) -#elif NUM_PIOS == 3 - Instance(channel == NeoBusChannel_0 ? pio0 : (channel == NeoBusChannel_1 ? pio1 : pio2)) -#endif { } NeoRp2040PioInstanceN() = delete; // no default constructor diff --git a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h index bcd6bfc2..6ac3fc0b 100644 --- a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h +++ b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h @@ -164,12 +164,7 @@ class NeoRp2040PioMonoProgram public: static inline uint add(PIO pio_instance) { - size_t index = -#if NUM_PIOS == 2 - (pio_instance == pio0) ? 0 : 1; -#elif NUM_PIOS == 3 - (pio_instance == pio0) ? 0 : (pio_instance == pio1 ? 1 : 2); -#endif + size_t index = (pio_instance == pio0) ? 0 : 1; if (s_loadedOffset[index] == c_ProgramNotLoaded) { assert(pio_can_add_program(pio_instance, &T_CADENCE::program)); @@ -208,16 +203,10 @@ class NeoRp2040PioMonoProgram } private: - static uint s_loadedOffset[NUM_PIOS]; // singlet instance of loaded program, one for each PIO hardware unit + static uint s_loadedOffset[2]; // singlet instance of loaded program, one for each PIO hardware unit }; template -uint NeoRp2040PioMonoProgram::s_loadedOffset[] = -#if NUM_PIOS == 2 - {c_ProgramNotLoaded, c_ProgramNotLoaded}; -#elif NUM_PIOS == 3 - {c_ProgramNotLoaded, c_ProgramNotLoaded, c_ProgramNotLoaded}; -#endif - +uint NeoRp2040PioMonoProgram::s_loadedOffset[] = {c_ProgramNotLoaded, c_ProgramNotLoaded}; #endif diff --git a/src/internal/methods/Rp2040/NeoRp2040x4Method.h b/src/internal/methods/Rp2040/NeoRp2040x4Method.h index 6969ade2..8ba02fe8 100644 --- a/src/internal/methods/Rp2040/NeoRp2040x4Method.h +++ b/src/internal/methods/Rp2040/NeoRp2040x4Method.h @@ -118,13 +118,13 @@ class NeoRp2040x4MethodBase if (_sizeData % 4 == 0) { // data is 4 byte aligned in size, - // use a 32 bit fifo word for efficiency + // use a 32 bit fifo word for effeciency fifoWordBits = 32; } else if (_sizeData % 2 == 0) { // data is 2 byte aligned in size, - // use a 16 bit fifo word for efficiency + // use a 16 bit fifo word for effeciency fifoWordBits = 16; } @@ -364,23 +364,6 @@ typedef NeoRp2040x4MethodBase R typedef NeoRp2040x4MethodBase Rp2040x4Pio1400KbpsMethod; typedef Rp2040x4Pio1Ws2805Method Rp2040x4Pio1Ws2814Method; -#if NUM_PIOS == 3 -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2811Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2812xMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2816Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2805Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Sk6812Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tm1814Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tm1829Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tm1914Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Apa106Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tx1812Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Gs1903Method; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2800KbpsMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2400KbpsMethod; -typedef Rp2040x4Pio2Ws2805Method Rp2040x4Pio2Ws2814Method; -#endif - // inverted typedef NeoRp2040x4MethodBase Rp2040x4NWs2811InvertedMethod; typedef NeoRp2040x4MethodBase Rp2040x4NWs2812xInvertedMethod; @@ -427,23 +410,6 @@ typedef NeoRp2040x4MethodBase Rp2040x4Pio1400KbpsInvertedMethod; typedef Rp2040x4Pio1Ws2805InvertedMethod Rp2040x4Pio1Ws2814InvertedMethod; -#if NUM_PIOS == 3 -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2811InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2812xInvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2816InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Ws2805InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Sk6812InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tm1814InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tm1829InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tm1914InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Apa106InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Tx1812InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2Gs1903InvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2800KbpsInvertedMethod; -typedef NeoRp2040x4MethodBase Rp2040x4Pio2400KbpsInvertedMethod; -typedef Rp2040x4Pio2Ws2805InvertedMethod Rp2040x4Pio2Ws2814InvertedMethod; -#endif - // PIO 1 method is the default method, and still x4 instances typedef Rp2040x4Pio1Ws2812xMethod NeoWs2813Method; typedef Rp2040x4Pio1Ws2812xMethod NeoWs2812xMethod;