From 8665476832352b51159de41935f81fd482159c50 Mon Sep 17 00:00:00 2001
From: Michael Miller <Makuna@hotmail.com>
Date: Fri, 21 Feb 2025 14:28:43 -0800
Subject: [PATCH 01/18] PIO2 support (#880)

---
 .../methods/Rp2040/NeoRp2040PioInstance.h     | 16 ++++++++
 .../methods/Rp2040/NeoRp2040PioMonoProgram.h  | 17 +++++++--
 .../methods/Rp2040/NeoRp2040x4Method.h        | 38 ++++++++++++++++++-
 3 files changed, 66 insertions(+), 5 deletions(-)

diff --git a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
index d51323b6..5fbb12ad 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
+++ b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
@@ -50,12 +50,28 @@ class NeoRp2040PioInstance1
     const PIO Instance;
 };
 
+#if NUM_PIOS == 3
+class NeoRp2040PioInstance2
+{
+public:
+    NeoRp2040PioInstance2() :
+        Instance(pio2)
+    {};
+
+    const PIO Instance;
+};
+#endif
+
 // dynamic channel support
 class NeoRp2040PioInstanceN
 {
 public:
     NeoRp2040PioInstanceN(NeoBusChannel channel) :
+#if NUM_PIOS == 2
         Instance(channel == NeoBusChannel_0 ? pio0 : pio1)
+#elif NUM_PIOS == 3
+        Instance(channel == NeoBusChannel_0 ? pio0 : (channel == NeoBusChannel_1 ? pio1 : pio2))
+#endif
     {
     }
     NeoRp2040PioInstanceN() = delete; // no default constructor
diff --git a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
index 6ac3fc0b..bcd6bfc2 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
+++ b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
@@ -164,7 +164,12 @@ class NeoRp2040PioMonoProgram
 public:
     static inline uint add(PIO pio_instance)
     {
-        size_t index = (pio_instance == pio0) ? 0 : 1;
+        size_t index = 
+#if NUM_PIOS == 2
+                (pio_instance == pio0) ? 0 : 1;
+#elif NUM_PIOS == 3
+                (pio_instance == pio0) ? 0 : (pio_instance == pio1 ? 1 : 2);
+#endif
         if (s_loadedOffset[index] == c_ProgramNotLoaded)
         {
             assert(pio_can_add_program(pio_instance, &T_CADENCE::program));
@@ -203,10 +208,16 @@ class NeoRp2040PioMonoProgram
     }
 
 private:
-    static uint s_loadedOffset[2]; // singlet instance of loaded program, one for each PIO hardware unit
+    static uint s_loadedOffset[NUM_PIOS]; // singlet instance of loaded program, one for each PIO hardware unit
 };
 
 template<typename T_CADENCE>
-uint NeoRp2040PioMonoProgram<T_CADENCE>::s_loadedOffset[] = {c_ProgramNotLoaded, c_ProgramNotLoaded};
+uint NeoRp2040PioMonoProgram<T_CADENCE>::s_loadedOffset[] = 
+#if NUM_PIOS == 2
+        {c_ProgramNotLoaded, c_ProgramNotLoaded};
+#elif NUM_PIOS == 3
+        {c_ProgramNotLoaded, c_ProgramNotLoaded, c_ProgramNotLoaded};
+#endif
+
 
 #endif
diff --git a/src/internal/methods/Rp2040/NeoRp2040x4Method.h b/src/internal/methods/Rp2040/NeoRp2040x4Method.h
index 8ba02fe8..6969ade2 100644
--- a/src/internal/methods/Rp2040/NeoRp2040x4Method.h
+++ b/src/internal/methods/Rp2040/NeoRp2040x4Method.h
@@ -118,13 +118,13 @@ class NeoRp2040x4MethodBase
         if (_sizeData % 4 == 0)
         {
             // data is 4 byte aligned in size,
-            // use a 32 bit fifo word for effeciency
+            // use a 32 bit fifo word for efficiency
             fifoWordBits = 32;
         }
         else if (_sizeData % 2 == 0)
         {
             // data is 2 byte aligned in size,
-            // use a 16 bit fifo word for effeciency
+            // use a 16 bit fifo word for efficiency
             fifoWordBits = 16;
         }
         
@@ -364,6 +364,23 @@ typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance1> R
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance1> Rp2040x4Pio1400KbpsMethod;
 typedef Rp2040x4Pio1Ws2805Method Rp2040x4Pio1Ws2814Method;
 
+#if NUM_PIOS == 3
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2811Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2812xMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2816Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2805, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2805Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedSk6812, NeoRp2040PioInstance2> Rp2040x4Pio2Sk6812Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1814, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1814Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1829, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1829Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1914, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1914Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedApa106, NeoRp2040PioInstance2> Rp2040x4Pio2Apa106Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTx1812, NeoRp2040PioInstance2> Rp2040x4Pio2Tx1812Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedGs1903, NeoRp2040PioInstance2> Rp2040x4Pio2Gs1903Method;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance2> Rp2040x4Pio2800KbpsMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance2> Rp2040x4Pio2400KbpsMethod;
+typedef Rp2040x4Pio2Ws2805Method Rp2040x4Pio2Ws2814Method;
+#endif
+
 // inverted
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstanceN, true> Rp2040x4NWs2811InvertedMethod;
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstanceN, true> Rp2040x4NWs2812xInvertedMethod;
@@ -410,6 +427,23 @@ typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance1, t
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance1, true> Rp2040x4Pio1400KbpsInvertedMethod;
 typedef Rp2040x4Pio1Ws2805InvertedMethod Rp2040x4Pio1Ws2814InvertedMethod;
 
+#if NUM_PIOS == 3
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2811InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2812xInvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2816InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2805, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2805InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedSk6812, NeoRp2040PioInstance2, true> Rp2040x4Pio2Sk6812InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1814, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1814InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1829, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1829InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1914, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1914InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedApa106, NeoRp2040PioInstance2, true> Rp2040x4Pio2Apa106InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTx1812, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tx1812InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedGs1903, NeoRp2040PioInstance2, true> Rp2040x4Pio2Gs1903InvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance2, true> Rp2040x4Pio2800KbpsInvertedMethod;
+typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance2, true> Rp2040x4Pio2400KbpsInvertedMethod;
+typedef Rp2040x4Pio2Ws2805InvertedMethod Rp2040x4Pio2Ws2814InvertedMethod;
+#endif
+
 // PIO 1 method is the default method, and still x4 instances 
 typedef Rp2040x4Pio1Ws2812xMethod NeoWs2813Method;
 typedef Rp2040x4Pio1Ws2812xMethod NeoWs2812xMethod;

From 44d9572d5c759ef79215865678d5672a5b9bb012 Mon Sep 17 00:00:00 2001
From: Michael Miller <Makuna@hotmail.com>
Date: Wed, 5 Mar 2025 13:09:56 -0800
Subject: [PATCH 02/18] MISO unused (#883)

---
 .../DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino  | 5 +++--
 .../DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino      | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
index cd31da2b..2d0de4ea 100644
--- a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
+++ b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
@@ -21,6 +21,7 @@
     // If you set useSpiAlternatePins true, then these pins will be used instead.  Any output-capable GPIO can be used.
     const uint8_t DotClockPin = 18;
     const uint8_t DotDataPin = 23;  
+    const uint8_t MisoUnusedPin = -1;
     const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false
 
     // for software bit bang (only use if neither SPI peripheral is available)
@@ -76,7 +77,7 @@ void setup()
 #if (USE_DEFAULT_SPI_PORT == 1)
     if (useSpiAlternatePins)
     {
-        strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin);
+        strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin);
     }
     else
     {
@@ -90,7 +91,7 @@ void setup()
 #if (USE_ALTERNATE_SPI_PORT == 1)
     if (useSpiAlternatePins2)
     {
-        strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2);
+        strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2);
     }
     else
     {
diff --git a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
index 41ffdbac..b370d88c 100644
--- a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
+++ b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
@@ -38,6 +38,7 @@
     // If you set useSpiAlternatePins true, then these pins will be used instead.  Any output-capable GPIO can be used.
     const uint8_t DotClockPin = 18;
     const uint8_t DotDataPin = 23;  
+    const uint8_t MisoUnusedPin = -1;
     const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false
 
     // for software bit bang (only use if neither SPI peripheral is available)
@@ -89,7 +90,7 @@ void setup()
 #if (USE_DEFAULT_SPI_PORT == 1)
     if (useSpiAlternatePins)
     {
-        strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin);
+        strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin);
     }
     else
     {
@@ -103,7 +104,7 @@ void setup()
 #if (USE_ALTERNATE_SPI_PORT == 1)
     if (useSpiAlternatePins2)
     {
-        strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2);
+        strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2);
     }
     else
     {

From 0c397853a5c782ccea28fe8ceaff76b6aa6472d0 Mon Sep 17 00:00:00 2001
From: Michael Miller <Makuna@hotmail.com>
Date: Tue, 29 Apr 2025 08:19:52 -0700
Subject: [PATCH 03/18] merge changes from CORE3 branch to fix compile issues
 for H2/P4 (#887)

---
 src/internal/methods/NeoEspBitBangMethod.cpp | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/internal/methods/NeoEspBitBangMethod.cpp b/src/internal/methods/NeoEspBitBangMethod.cpp
index 910d2dca..4ba20d2e 100644
--- a/src/internal/methods/NeoEspBitBangMethod.cpp
+++ b/src/internal/methods/NeoEspBitBangMethod.cpp
@@ -36,7 +36,7 @@ static inline uint32_t getCycleCount(void)
 {
     uint32_t ccount;
 
-#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2)
+#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
     __asm__ __volatile__("csrr %0,0x7e2":"=r" (ccount));
     //ccount = esp_cpu_get_ccount();
 #else
@@ -46,7 +46,8 @@ static inline uint32_t getCycleCount(void)
 }
 
 // Interrupt lock class, used for RAII interrupt disabling
-class InterruptLock {
+class InterruptLock
+{
 #if defined(ARDUINO_ARCH_ESP32)
     portMUX_TYPE updateMux;
 #endif
@@ -61,7 +62,7 @@ class InterruptLock {
     }
 
     inline void unlock()
-    {        
+    {
 #if defined(ARDUINO_ARCH_ESP32)
         portEXIT_CRITICAL(&updateMux);
 #else
@@ -76,12 +77,12 @@ class InterruptLock {
         unlock();
         lock();
     }
-    
+
     inline InterruptLock()
 #if defined(ARDUINO_ARCH_ESP32)
         : updateMux(portMUX_INITIALIZER_UNLOCKED)
 #endif    
-    { 
+    {
         lock();
     }
 
@@ -114,13 +115,13 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels,
     volatile uint32_t* setRegister;
     volatile uint32_t* clearRegister;
 
-#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2)
+#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
     if (pin < 32)
     {
         setRegister = &GPIO.out_w1ts.val;
         clearRegister = &GPIO.out_w1tc.val;
     }
-#if !defined(CONFIG_IDF_TARGET_ESP32C3)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H2)
     else
     {
         setRegister = &GPIO.out1_w1ts.val;

From fd670ee534064ddf5765e4db63c213ba05bbe880 Mon Sep 17 00:00:00 2001
From: Michael Miller <Makuna@hotmail.com>
Date: Tue, 29 Apr 2025 08:38:17 -0700
Subject: [PATCH 04/18] inc version (#888)

---
 library.json       | 2 +-
 library.properties | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/library.json b/library.json
index 51b14b33..36037659 100644
--- a/library.json
+++ b/library.json
@@ -7,7 +7,7 @@
     "type": "git",
     "url": "https://github.com/Makuna/NeoPixelBus"
   },
-  "version": "2.8.3",
+  "version": "2.8.4",
   "frameworks": "arduino",
   "platforms": "*",
   "dependencies": [
diff --git a/library.properties b/library.properties
index e2e07949..1b8218b2 100644
--- a/library.properties
+++ b/library.properties
@@ -1,5 +1,5 @@
 name=NeoPixelBus by Makuna
-version=2.8.3
+version=2.8.4
 author=Michael C. Miller (makuna@live.com)
 maintainer=Michael C. Miller (makuna@live.com)
 sentence=A library that makes controlling NeoPixels (WS2812x and many others) and DotStars (SK6812 and many others) easy.

From ec6f3415e06829f3f189039986712cde01003281 Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Sun, 9 Nov 2025 21:13:02 +0100
Subject: [PATCH 05/18] gpio_hal_iomux_func_sel() functon does not exist
 anymore

---
 src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
index 268790f5..5bcc375f 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
@@ -546,7 +546,7 @@ class NeoEsp32LcdMuxBus
         
         uint8_t muxIdx = LCD_DATA_OUT0_IDX + _muxId;
         esp_rom_gpio_connect_out_signal(pin, muxIdx, invert, false);
-        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO);
+        PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO);
         gpio_set_drive_capability((gpio_num_t)pin, (gpio_drive_cap_t)3);
     }
 

From bb3e1daeba56799dc6fe9a08b91bfef17fc9506b Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Sun, 9 Nov 2025 21:25:05 +0100
Subject: [PATCH 06/18] add TAG to remove compile error

---
 src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
index 20c4b9d5..abbc88cc 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
@@ -41,6 +41,8 @@ extern "C"
 #include "esp_check.h"
 }
 
+static const char *TAG = "led_strip_rmt"; // TODO: Remove all TAG log stuff
+
 struct led_strip_encoder_config_t
 {
     uint32_t resolution; /*!< Encoder resolution, in Hz */
@@ -279,7 +281,7 @@ template<typename T_SPEED, typename T_INVERTED = NeoEsp32RmtNotInverted> class N
         bytes_encoder_config.bit1.val = bit1;
 
         bytes_encoder_config.flags.msb_first = 1; // WS2812 transfer bit order: G7...G0R7...R0B7...B0 - TODO: more checks
-
+\
         ESP_GOTO_ON_ERROR(rmt_new_bytes_encoder(&bytes_encoder_config, &led_encoder->bytes_encoder), err, "TEST_RMT", "create bytes encoder failed");
         ESP_GOTO_ON_ERROR(rmt_new_copy_encoder(&copy_encoder_config, &led_encoder->copy_encoder), err, "TEST_RMT", "create copy encoder failed");
 

From 80927446f96e83172d7c3e4d62aacc09b05c17d1 Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Sun, 9 Nov 2025 21:34:05 +0100
Subject: [PATCH 07/18] switch to new AHB and AXI when possible

---
 src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
index 5bcc375f..1d6e707c 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
@@ -437,7 +437,13 @@ class NeoEspLcdMonoBuffContext
                 .sibling_chan = NULL,
                 .direction = GDMA_CHANNEL_DIRECTION_TX,
                 .flags = {.reserve_sibling = 0}};
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+            gdma_new_ahb_channel(&dma_chan_config, &_dmaChannel);
+#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
+            gdma_new_axi_channel(&dma_chan_config, &_dmaChannel);
+#else
             gdma_new_channel(&dma_chan_config, &_dmaChannel);
+#endif
             gdma_connect(_dmaChannel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_LCD, 0));
             gdma_strategy_config_t strategy_config = {.owner_check = false,
                                                         .auto_update_desc = false};

From 0c0f1c431cb5917d6cdda49d13611353c1b3e4de Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Sun, 9 Nov 2025 21:51:11 +0100
Subject: [PATCH 08/18] fix compile error

---
 src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp b/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
index 09213ac2..121366a7 100644
--- a/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
+++ b/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
@@ -27,7 +27,7 @@ License along with NeoPixel.  If not, see
 #ifdef ARDUINO_ARCH_ESP8266
 
 #include <Arduino.h>
-#include "../NeoSettings.h"
+#include "../../../NeoSettings.h"
 #include "NeoEsp8266UartMethod.h"
 #include <utility>
 extern "C"

From ed2e60e647e7eba0edddebc58c279cf85fda44af Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Sun, 9 Nov 2025 21:55:18 +0100
Subject: [PATCH 09/18] tx_pcm_bypass not supported by ESP32-S2, fix compile
 error.

---
 src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
index 7fbcb2a0..b46514e9 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
@@ -516,7 +516,9 @@ void i2sInit(uint8_t bus_num,
 //        conf1.rx_pcm_bypass = 1;
 
         conf1.tx_stop_en = 0;
+#if SOC_I2S_SUPPORTS_PCM_BYPASS
         conf1.tx_pcm_bypass = 1;
+#endif
         i2s->conf1.val = conf1.val;
     }
 

From 24debcb0af29779bd105624c6517f05b5c9423b0 Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Sun, 18 Jan 2026 18:54:32 +0100
Subject: [PATCH 10/18] ESP32-C5 initial support.

---
 src/internal/NeoMethods.h                                   | 2 +-
 src/internal/XMethods.h                                     | 2 +-
 src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c         | 4 ++--
 src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h | 2 +-
 .../methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h         | 2 +-
 .../methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp        | 2 +-
 src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h         | 2 +-
 src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h         | 4 ++--
 src/internal/methods/ESP/NeoEspBitBangMethod.cpp            | 6 +++---
 9 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/src/internal/NeoMethods.h b/src/internal/NeoMethods.h
index 0cce59b9..19fcaf3b 100644
--- a/src/internal/NeoMethods.h
+++ b/src/internal/NeoMethods.h
@@ -74,7 +74,7 @@ License along with NeoPixel.  If not, see
 #endif // ESP_IDF_VERSION_MAJOR < 5
 
 // once we have a core3 i2s, then fix this
-#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h"
 #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h"
 #endif
diff --git a/src/internal/XMethods.h b/src/internal/XMethods.h
index 0a45d972..48ba7b4a 100644
--- a/src/internal/XMethods.h
+++ b/src/internal/XMethods.h
@@ -69,7 +69,7 @@ typedef NeoEsp32LcdX16Ws2812Method    X16Ws2812Method;
 typedef NeoEsp32LcdX16Lc8812Method    X16Lc8812Method;
 
 
-#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
 
 //----------------------------------------------------------
 typedef NeoEsp32RmtXWs2812xMethod   XWs2812xMethod;
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
index b46514e9..6b8281d5 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
@@ -23,7 +23,7 @@
 #include "stdlib.h"
 
 // ESP32 C3, S3, C6, H2, and P4 I2S is not supported yet due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -952,6 +952,6 @@ bool i2sGetClks(uint8_t bus_num,
 }
 #endif
 
-#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #endif // defined(ARDUINO_ARCH_ESP32)
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
index a3c181f6..fb9021c8 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
@@ -28,7 +28,7 @@ License along with NeoPixel.  If not, see
 
 // ESP32 beyond C3 & S3 I2S is not supported yet 
 // due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 
 extern "C"
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
index 35934e96..f099620c 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
@@ -28,7 +28,7 @@ License along with NeoPixel.  If not, see
 
 // ESP32 beyond C3 & S3 I2S is not supported yet 
 // due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 extern "C"
 {
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
index 8f91436e..32b2fce0 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
@@ -31,7 +31,7 @@ License along with NeoPixel.  If not, see
 
 #if ESP_IDF_VERSION_MAJOR < 5
 
-#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #include "../../../../NeoSettings.h"
 #include "../../../../NeoBusChannel.h"
diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
index 1d6e707c..b224331c 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
@@ -439,7 +439,7 @@ class NeoEspLcdMonoBuffContext
                 .flags = {.reserve_sibling = 0}};
 #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
             gdma_new_ahb_channel(&dma_chan_config, &_dmaChannel);
-#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
+#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
             gdma_new_axi_channel(&dma_chan_config, &_dmaChannel);
 #else
             gdma_new_channel(&dma_chan_config, &_dmaChannel);
diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
index abbc88cc..326c5dfa 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
@@ -357,7 +357,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedGs1903, NeoEsp32RmtInverted> NeoEs
 typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtInverted> NeoEsp32RmtX800KbpsInvertedMethod;
 typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtInverted> NeoEsp32RmtX400KbpsInvertedMethod;
 
-#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32S3)
+#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32S3)
 
 // Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT 
 // will switch to use RMT as the default method
@@ -392,6 +392,6 @@ typedef NeoEsp32RmtXWs2812xInvertedMethod Neo800KbpsInvertedMethod;
 typedef NeoEsp32RmtX400KbpsInvertedMethod Neo400KbpsInvertedMethod;
 
 
-#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
+#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5)
 
 #endif
diff --git a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
index 4ba20d2e..2deeefe2 100644
--- a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
+++ b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
@@ -36,7 +36,7 @@ static inline uint32_t getCycleCount(void)
 {
     uint32_t ccount;
 
-#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
     __asm__ __volatile__("csrr %0,0x7e2":"=r" (ccount));
     //ccount = esp_cpu_get_ccount();
 #else
@@ -115,7 +115,7 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels,
     volatile uint32_t* setRegister;
     volatile uint32_t* clearRegister;
 
-#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
     if (pin < 32)
     {
         setRegister = &GPIO.out_w1ts.val;
@@ -139,7 +139,7 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels,
         setRegister = &GPIO.out1_w1ts.val;
         clearRegister = &GPIO.out1_w1tc.val;
     }
-#endif // defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2)
+#endif // defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #else // just ESP8266
     uint32_t setRegister = PERIPHS_GPIO_BASEADDR + GPIO_OUT_W1TS_ADDRESS;

From 32d9c951eacef4ee352f81078324e1200d53a31d Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Thu, 20 Aug 2026 18:16:46 +0200
Subject: [PATCH 11/18] - C5 RMT channel handling - bit-bang CSR/GPIO - channel
 constructor overload

---
 .../DotStarTest_Esp32Advanced.ino             |  5 +--
 .../DotStarTest_Esp32DmaSpi.ino               |  5 +--
 src/internal/NeoMethods.h                     |  2 +-
 src/internal/XMethods.h                       |  2 +-
 .../methods/ESP/ESP32/Core_2_x/Esp32_i2s.c    |  8 ++--
 .../ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h    |  2 +-
 .../ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h   |  2 +-
 .../ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp  |  2 +-
 .../methods/ESP/ESP32/NeoEsp32LcdXMethod.h    |  8 +---
 .../methods/ESP/ESP32/NeoEsp32RmtXMethod.h    | 12 +++---
 .../ESP/ESP8266/NeoEsp8266UartMethod.cpp      |  2 +-
 .../methods/ESP/NeoEspBitBangMethod.cpp       | 19 +++++-----
 .../methods/ESP/NeoEspBitBangMethod.h         |  8 ++++
 .../methods/Rp2040/NeoRp2040PioInstance.h     | 16 --------
 .../methods/Rp2040/NeoRp2040PioMonoProgram.h  | 17 ++-------
 .../methods/Rp2040/NeoRp2040x4Method.h        | 38 +------------------
 16 files changed, 44 insertions(+), 104 deletions(-)

diff --git a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
index 2d0de4ea..cd31da2b 100644
--- a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
+++ b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
@@ -21,7 +21,6 @@
     // If you set useSpiAlternatePins true, then these pins will be used instead.  Any output-capable GPIO can be used.
     const uint8_t DotClockPin = 18;
     const uint8_t DotDataPin = 23;  
-    const uint8_t MisoUnusedPin = -1;
     const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false
 
     // for software bit bang (only use if neither SPI peripheral is available)
@@ -77,7 +76,7 @@ void setup()
 #if (USE_DEFAULT_SPI_PORT == 1)
     if (useSpiAlternatePins)
     {
-        strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin);
+        strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin);
     }
     else
     {
@@ -91,7 +90,7 @@ void setup()
 #if (USE_ALTERNATE_SPI_PORT == 1)
     if (useSpiAlternatePins2)
     {
-        strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2);
+        strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2);
     }
     else
     {
diff --git a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
index b370d88c..41ffdbac 100644
--- a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
+++ b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
@@ -38,7 +38,6 @@
     // If you set useSpiAlternatePins true, then these pins will be used instead.  Any output-capable GPIO can be used.
     const uint8_t DotClockPin = 18;
     const uint8_t DotDataPin = 23;  
-    const uint8_t MisoUnusedPin = -1;
     const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false
 
     // for software bit bang (only use if neither SPI peripheral is available)
@@ -90,7 +89,7 @@ void setup()
 #if (USE_DEFAULT_SPI_PORT == 1)
     if (useSpiAlternatePins)
     {
-        strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin);
+        strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin);
     }
     else
     {
@@ -104,7 +103,7 @@ void setup()
 #if (USE_ALTERNATE_SPI_PORT == 1)
     if (useSpiAlternatePins2)
     {
-        strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2);
+        strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2);
     }
     else
     {
diff --git a/src/internal/NeoMethods.h b/src/internal/NeoMethods.h
index 19fcaf3b..0cce59b9 100644
--- a/src/internal/NeoMethods.h
+++ b/src/internal/NeoMethods.h
@@ -74,7 +74,7 @@ License along with NeoPixel.  If not, see
 #endif // ESP_IDF_VERSION_MAJOR < 5
 
 // once we have a core3 i2s, then fix this
-#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h"
 #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h"
 #endif
diff --git a/src/internal/XMethods.h b/src/internal/XMethods.h
index 48ba7b4a..0a45d972 100644
--- a/src/internal/XMethods.h
+++ b/src/internal/XMethods.h
@@ -69,7 +69,7 @@ typedef NeoEsp32LcdX16Ws2812Method    X16Ws2812Method;
 typedef NeoEsp32LcdX16Lc8812Method    X16Lc8812Method;
 
 
-#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
 
 //----------------------------------------------------------
 typedef NeoEsp32RmtXWs2812xMethod   XWs2812xMethod;
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
index 6b8281d5..85200f82 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
@@ -22,8 +22,8 @@
 #include <stdio.h>
 #include "stdlib.h"
 
-// ESP32 C3, S3, C6, H2, and P4 I2S is not supported yet due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+// ESP32 C3, S3, C5, C6, H2, and P4 I2S is not supported yet due to significant changes to interface
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -516,9 +516,7 @@ void i2sInit(uint8_t bus_num,
 //        conf1.rx_pcm_bypass = 1;
 
         conf1.tx_stop_en = 0;
-#if SOC_I2S_SUPPORTS_PCM_BYPASS
         conf1.tx_pcm_bypass = 1;
-#endif
         i2s->conf1.val = conf1.val;
     }
 
@@ -952,6 +950,6 @@ bool i2sGetClks(uint8_t bus_num,
 }
 #endif
 
-#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #endif // defined(ARDUINO_ARCH_ESP32)
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
index fb9021c8..a3c181f6 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
@@ -28,7 +28,7 @@ License along with NeoPixel.  If not, see
 
 // ESP32 beyond C3 & S3 I2S is not supported yet 
 // due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 
 extern "C"
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
index f099620c..35934e96 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
@@ -28,7 +28,7 @@ License along with NeoPixel.  If not, see
 
 // ESP32 beyond C3 & S3 I2S is not supported yet 
 // due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 extern "C"
 {
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
index 32b2fce0..8f91436e 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
@@ -31,7 +31,7 @@ License along with NeoPixel.  If not, see
 
 #if ESP_IDF_VERSION_MAJOR < 5
 
-#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #include "../../../../NeoSettings.h"
 #include "../../../../NeoBusChannel.h"
diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
index b224331c..268790f5 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
@@ -437,13 +437,7 @@ class NeoEspLcdMonoBuffContext
                 .sibling_chan = NULL,
                 .direction = GDMA_CHANNEL_DIRECTION_TX,
                 .flags = {.reserve_sibling = 0}};
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
-            gdma_new_ahb_channel(&dma_chan_config, &_dmaChannel);
-#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
-            gdma_new_axi_channel(&dma_chan_config, &_dmaChannel);
-#else
             gdma_new_channel(&dma_chan_config, &_dmaChannel);
-#endif
             gdma_connect(_dmaChannel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_LCD, 0));
             gdma_strategy_config_t strategy_config = {.owner_check = false,
                                                         .auto_update_desc = false};
@@ -552,7 +546,7 @@ class NeoEsp32LcdMuxBus
         
         uint8_t muxIdx = LCD_DATA_OUT0_IDX + _muxId;
         esp_rom_gpio_connect_out_signal(pin, muxIdx, invert, false);
-        PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO);
+        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO);
         gpio_set_drive_capability((gpio_num_t)pin, (gpio_drive_cap_t)3);
     }
 
diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
index 326c5dfa..c7c7a3c3 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
@@ -28,6 +28,10 @@ License along with NeoPixel.  If not, see
 
 #if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C2)
 
+// Needed for ESP_* macros that take a log_tag
+#include "esp_log.h"
+static const char* TAG = "NeoEsp32RmtX";
+
 #include <Arduino.h>
 #include "NeoEsp32RmtSpeed.h"
 
@@ -41,8 +45,6 @@ extern "C"
 #include "esp_check.h"
 }
 
-static const char *TAG = "led_strip_rmt"; // TODO: Remove all TAG log stuff
-
 struct led_strip_encoder_config_t
 {
     uint32_t resolution; /*!< Encoder resolution, in Hz */
@@ -281,7 +283,7 @@ template<typename T_SPEED, typename T_INVERTED = NeoEsp32RmtNotInverted> class N
         bytes_encoder_config.bit1.val = bit1;
 
         bytes_encoder_config.flags.msb_first = 1; // WS2812 transfer bit order: G7...G0R7...R0B7...B0 - TODO: more checks
-\
+
         ESP_GOTO_ON_ERROR(rmt_new_bytes_encoder(&bytes_encoder_config, &led_encoder->bytes_encoder), err, "TEST_RMT", "create bytes encoder failed");
         ESP_GOTO_ON_ERROR(rmt_new_copy_encoder(&copy_encoder_config, &led_encoder->copy_encoder), err, "TEST_RMT", "create copy encoder failed");
 
@@ -357,7 +359,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedGs1903, NeoEsp32RmtInverted> NeoEs
 typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtInverted> NeoEsp32RmtX800KbpsInvertedMethod;
 typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtInverted> NeoEsp32RmtX400KbpsInvertedMethod;
 
-#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32S3)
+#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32S3)
 
 // Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT 
 // will switch to use RMT as the default method
@@ -392,6 +394,6 @@ typedef NeoEsp32RmtXWs2812xInvertedMethod Neo800KbpsInvertedMethod;
 typedef NeoEsp32RmtX400KbpsInvertedMethod Neo400KbpsInvertedMethod;
 
 
-#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5)
+#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
 
 #endif
diff --git a/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp b/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
index 121366a7..09213ac2 100644
--- a/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
+++ b/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
@@ -27,7 +27,7 @@ License along with NeoPixel.  If not, see
 #ifdef ARDUINO_ARCH_ESP8266
 
 #include <Arduino.h>
-#include "../../../NeoSettings.h"
+#include "../NeoSettings.h"
 #include "NeoEsp8266UartMethod.h"
 #include <utility>
 extern "C"
diff --git a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
index 2deeefe2..09ad953f 100644
--- a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
+++ b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
@@ -36,7 +36,9 @@ static inline uint32_t getCycleCount(void)
 {
     uint32_t ccount;
 
-#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#if defined(CONFIG_IDF_TARGET_ESP32C5)
+    __asm__ __volatile__("csrr %0,0xC00":"=r" (ccount)); // standard RISC-V cycle counter
+#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
     __asm__ __volatile__("csrr %0,0x7e2":"=r" (ccount));
     //ccount = esp_cpu_get_ccount();
 #else
@@ -46,8 +48,7 @@ static inline uint32_t getCycleCount(void)
 }
 
 // Interrupt lock class, used for RAII interrupt disabling
-class InterruptLock
-{
+class InterruptLock {
 #if defined(ARDUINO_ARCH_ESP32)
     portMUX_TYPE updateMux;
 #endif
@@ -62,7 +63,7 @@ class InterruptLock
     }
 
     inline void unlock()
-    {
+    {        
 #if defined(ARDUINO_ARCH_ESP32)
         portEXIT_CRITICAL(&updateMux);
 #else
@@ -77,12 +78,12 @@ class InterruptLock
         unlock();
         lock();
     }
-
+    
     inline InterruptLock()
 #if defined(ARDUINO_ARCH_ESP32)
         : updateMux(portMUX_INITIALIZER_UNLOCKED)
 #endif    
-    {
+    { 
         lock();
     }
 
@@ -115,13 +116,13 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels,
     volatile uint32_t* setRegister;
     volatile uint32_t* clearRegister;
 
-#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
     if (pin < 32)
     {
         setRegister = &GPIO.out_w1ts.val;
         clearRegister = &GPIO.out_w1tc.val;
     }
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
     else
     {
         setRegister = &GPIO.out1_w1ts.val;
@@ -139,7 +140,7 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels,
         setRegister = &GPIO.out1_w1ts.val;
         clearRegister = &GPIO.out1_w1tc.val;
     }
-#endif // defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2)
+#endif // defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #else // just ESP8266
     uint32_t setRegister = PERIPHS_GPIO_BASEADDR + GPIO_OUT_W1TS_ADDRESS;
diff --git a/src/internal/methods/ESP/NeoEspBitBangMethod.h b/src/internal/methods/ESP/NeoEspBitBangMethod.h
index 01acd5d5..55ce0f94 100644
--- a/src/internal/methods/ESP/NeoEspBitBangMethod.h
+++ b/src/internal/methods/ESP/NeoEspBitBangMethod.h
@@ -28,6 +28,8 @@ License along with NeoPixel.  If not, see
 
 #if defined(ARDUINO_ARCH_ESP8266) || defined(ARDUINO_ARCH_ESP32)
 
+#include "../../NeoBusChannel.h" // for NeoBusChannel enum (used by channel-aware constructor overload)
+
 #if defined(ARDUINO_ARCH_ESP8266)
 #include <eagle_soc.h>
 #endif
@@ -204,6 +206,12 @@ template<typename T_SPEED, typename T_INVERTED, bool V_INTER_PIXEL_ISR> class Ne
         // data cleared later in Begin()
     }
 
+    // overload: accept and ignore channel parameter (for RMT-to-BitBang substitution)
+    NeoEspBitBangMethodBase(uint8_t pin, uint16_t pixelCount, size_t elementSize, size_t settingsSize, NeoBusChannel) :
+        NeoEspBitBangMethodBase(pin, pixelCount, elementSize, settingsSize)
+    {
+    }
+
     ~NeoEspBitBangMethodBase()
     {
         pinMode(_pin, INPUT);
diff --git a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
index 5fbb12ad..d51323b6 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
+++ b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
@@ -50,28 +50,12 @@ class NeoRp2040PioInstance1
     const PIO Instance;
 };
 
-#if NUM_PIOS == 3
-class NeoRp2040PioInstance2
-{
-public:
-    NeoRp2040PioInstance2() :
-        Instance(pio2)
-    {};
-
-    const PIO Instance;
-};
-#endif
-
 // dynamic channel support
 class NeoRp2040PioInstanceN
 {
 public:
     NeoRp2040PioInstanceN(NeoBusChannel channel) :
-#if NUM_PIOS == 2
         Instance(channel == NeoBusChannel_0 ? pio0 : pio1)
-#elif NUM_PIOS == 3
-        Instance(channel == NeoBusChannel_0 ? pio0 : (channel == NeoBusChannel_1 ? pio1 : pio2))
-#endif
     {
     }
     NeoRp2040PioInstanceN() = delete; // no default constructor
diff --git a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
index bcd6bfc2..6ac3fc0b 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
+++ b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
@@ -164,12 +164,7 @@ class NeoRp2040PioMonoProgram
 public:
     static inline uint add(PIO pio_instance)
     {
-        size_t index = 
-#if NUM_PIOS == 2
-                (pio_instance == pio0) ? 0 : 1;
-#elif NUM_PIOS == 3
-                (pio_instance == pio0) ? 0 : (pio_instance == pio1 ? 1 : 2);
-#endif
+        size_t index = (pio_instance == pio0) ? 0 : 1;
         if (s_loadedOffset[index] == c_ProgramNotLoaded)
         {
             assert(pio_can_add_program(pio_instance, &T_CADENCE::program));
@@ -208,16 +203,10 @@ class NeoRp2040PioMonoProgram
     }
 
 private:
-    static uint s_loadedOffset[NUM_PIOS]; // singlet instance of loaded program, one for each PIO hardware unit
+    static uint s_loadedOffset[2]; // singlet instance of loaded program, one for each PIO hardware unit
 };
 
 template<typename T_CADENCE>
-uint NeoRp2040PioMonoProgram<T_CADENCE>::s_loadedOffset[] = 
-#if NUM_PIOS == 2
-        {c_ProgramNotLoaded, c_ProgramNotLoaded};
-#elif NUM_PIOS == 3
-        {c_ProgramNotLoaded, c_ProgramNotLoaded, c_ProgramNotLoaded};
-#endif
-
+uint NeoRp2040PioMonoProgram<T_CADENCE>::s_loadedOffset[] = {c_ProgramNotLoaded, c_ProgramNotLoaded};
 
 #endif
diff --git a/src/internal/methods/Rp2040/NeoRp2040x4Method.h b/src/internal/methods/Rp2040/NeoRp2040x4Method.h
index 6969ade2..8ba02fe8 100644
--- a/src/internal/methods/Rp2040/NeoRp2040x4Method.h
+++ b/src/internal/methods/Rp2040/NeoRp2040x4Method.h
@@ -118,13 +118,13 @@ class NeoRp2040x4MethodBase
         if (_sizeData % 4 == 0)
         {
             // data is 4 byte aligned in size,
-            // use a 32 bit fifo word for efficiency
+            // use a 32 bit fifo word for effeciency
             fifoWordBits = 32;
         }
         else if (_sizeData % 2 == 0)
         {
             // data is 2 byte aligned in size,
-            // use a 16 bit fifo word for efficiency
+            // use a 16 bit fifo word for effeciency
             fifoWordBits = 16;
         }
         
@@ -364,23 +364,6 @@ typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance1> R
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance1> Rp2040x4Pio1400KbpsMethod;
 typedef Rp2040x4Pio1Ws2805Method Rp2040x4Pio1Ws2814Method;
 
-#if NUM_PIOS == 3
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2811Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2812xMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2816Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2805, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2805Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedSk6812, NeoRp2040PioInstance2> Rp2040x4Pio2Sk6812Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1814, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1814Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1829, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1829Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1914, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1914Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedApa106, NeoRp2040PioInstance2> Rp2040x4Pio2Apa106Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTx1812, NeoRp2040PioInstance2> Rp2040x4Pio2Tx1812Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedGs1903, NeoRp2040PioInstance2> Rp2040x4Pio2Gs1903Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance2> Rp2040x4Pio2800KbpsMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance2> Rp2040x4Pio2400KbpsMethod;
-typedef Rp2040x4Pio2Ws2805Method Rp2040x4Pio2Ws2814Method;
-#endif
-
 // inverted
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstanceN, true> Rp2040x4NWs2811InvertedMethod;
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstanceN, true> Rp2040x4NWs2812xInvertedMethod;
@@ -427,23 +410,6 @@ typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance1, t
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance1, true> Rp2040x4Pio1400KbpsInvertedMethod;
 typedef Rp2040x4Pio1Ws2805InvertedMethod Rp2040x4Pio1Ws2814InvertedMethod;
 
-#if NUM_PIOS == 3
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2811InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2812xInvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2816InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2805, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2805InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedSk6812, NeoRp2040PioInstance2, true> Rp2040x4Pio2Sk6812InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1814, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1814InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1829, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1829InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1914, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1914InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedApa106, NeoRp2040PioInstance2, true> Rp2040x4Pio2Apa106InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTx1812, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tx1812InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedGs1903, NeoRp2040PioInstance2, true> Rp2040x4Pio2Gs1903InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance2, true> Rp2040x4Pio2800KbpsInvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance2, true> Rp2040x4Pio2400KbpsInvertedMethod;
-typedef Rp2040x4Pio2Ws2805InvertedMethod Rp2040x4Pio2Ws2814InvertedMethod;
-#endif
-
 // PIO 1 method is the default method, and still x4 instances 
 typedef Rp2040x4Pio1Ws2812xMethod NeoWs2813Method;
 typedef Rp2040x4Pio1Ws2812xMethod NeoWs2812xMethod;

From 7c29e20f02bcb75582a58f71025a4b31a7a91374 Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Thu, 20 Aug 2026 18:42:05 +0200
Subject: [PATCH 12/18] - C5 RMT channel handling - bit-bang CSR/GPIO - channel
 constructor overload

---
 .../methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp        | 4 ++--
 src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp   | 2 +-
 src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp     | 6 +++---
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
index 8f91436e..687c3bf6 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
@@ -33,8 +33,8 @@ License along with NeoPixel.  If not, see
 
 #if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
-#include "../../../../NeoSettings.h"
-#include "../../../../NeoBusChannel.h"
+#include "../../../NeoSettings.h"
+#include "../../../NeoBusChannel.h"
 #include "NeoEsp32RmtMethod.h"
 
 // translate NeoPixelBuffer into RMT buffer
diff --git a/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp b/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
index 09213ac2..121366a7 100644
--- a/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
+++ b/src/internal/methods/ESP/ESP8266/NeoEsp8266UartMethod.cpp
@@ -27,7 +27,7 @@ License along with NeoPixel.  If not, see
 #ifdef ARDUINO_ARCH_ESP8266
 
 #include <Arduino.h>
-#include "../NeoSettings.h"
+#include "../../../NeoSettings.h"
 #include "NeoEsp8266UartMethod.h"
 #include <utility>
 extern "C"
diff --git a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp
index e73e4536..19e63bc0 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp
+++ b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp
@@ -25,9 +25,9 @@ License along with NeoPixel.  If not, see
 -------------------------------------------------------------------------*/
 
 #include <Arduino.h>
-#include "../../NeoUtil.h"
-#include "../../NeoBusChannel.h"
-#include "../../NeoSettings.h"
+#include "../../../NeoUtil.h"
+#include "../../../NeoBusChannel.h"
+#include "../../../NeoSettings.h"
 #include "NeoRp2040x4Method.h"
 
 #ifdef ARDUINO_ARCH_RP2040

From 5eb73fcaf73ecc8d507d0162fb627ab22894c238 Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Thu, 20 Aug 2026 18:45:06 +0200
Subject: [PATCH 13/18] - C5 RMT channel handling - bit-bang CSR/GPIO - channel
 constructor overload

---
 src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp
index 19e63bc0..e73e4536 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp
+++ b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.cpp
@@ -25,9 +25,9 @@ License along with NeoPixel.  If not, see
 -------------------------------------------------------------------------*/
 
 #include <Arduino.h>
-#include "../../../NeoUtil.h"
-#include "../../../NeoBusChannel.h"
-#include "../../../NeoSettings.h"
+#include "../../NeoUtil.h"
+#include "../../NeoBusChannel.h"
+#include "../../NeoSettings.h"
 #include "NeoRp2040x4Method.h"
 
 #ifdef ARDUINO_ARCH_RP2040

From 94781ba15d38a544067abfff5895f8a81a6e7112 Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Thu, 20 Aug 2026 18:57:36 +0200
Subject: [PATCH 14/18] - C5 RMT channel handling - bit-bang CSR/GPIO - channel
 constructor overload

---
 src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
index 85200f82..87f46256 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
@@ -516,7 +516,11 @@ void i2sInit(uint8_t bus_num,
 //        conf1.rx_pcm_bypass = 1;
 
         conf1.tx_stop_en = 0;
+#if defined(CONFIG_IDF_TARGET_ESP32S2)
+        conf1.reserved0 = 0;
+#else
         conf1.tx_pcm_bypass = 1;
+#endif
         i2s->conf1.val = conf1.val;
     }
 

From 7b03a8949a6f69560b383e6d93fd87cac4b354cf Mon Sep 17 00:00:00 2001
From: darkgrue <darkgrue@users.noreply.github.com>
Date: Fri, 29 May 2026 13:38:22 -0500
Subject: [PATCH 15/18] Implement coryking c0f7ec8 commit.

Replace deprecated `gpio_hal_iomux_func_sel()` with `gpio_iomux_out()` for ESP-IDF 5.5+.

- ESP-IDF 5.5.0 removed `gpio_hal_iomux_func_sel()`.
- Use `gpio_iomux_out()` for ESP-IDF 5.5+.
- Maintain backward compatibility with `#ifdef` for older versions.
- Fixes compilation error with pioarduino platform (ESP-IDF 5.5.1).

Tested with:
- pioarduino platform (ESP-IDF 5.5.1, Arduino Core 3.3.4).
- ESP32-S3 boards (Lolin S3 Mini, Seeed XIAO ESP32S3).

Resolves: Makuna#895
---
 src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
index 268790f5..d6d1f571 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
@@ -546,7 +546,11 @@ class NeoEsp32LcdMuxBus
         
         uint8_t muxIdx = LCD_DATA_OUT0_IDX + _muxId;
         esp_rom_gpio_connect_out_signal(pin, muxIdx, invert, false);
-        gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO);
+        #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 5, 0)
+            gpio_iomux_out(pin, PIN_FUNC_GPIO, false);
+        #else
+            gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO);
+        #endif
         gpio_set_drive_capability((gpio_num_t)pin, (gpio_drive_cap_t)3);
     }
 

From f4c16cb60216b52674b00ce814a9abb7a4e2026b Mon Sep 17 00:00:00 2001
From: darkgrue <darkgrue@users.noreply.github.com>
Date: Fri, 19 Jun 2026 12:16:33 -0500
Subject: [PATCH 16/18] fix(ESP32 RMT): size RMT buffer per chip and use DMA
 where available

config.mem_block_symbols = 192 in NeoEsp32RmtXMethod.h gives the RMT
ping-pong half-buffer only ~96 symbols (~120us at WS2812x 800Kbps).
NimBLE and WiFi event handlers run at higher interrupt priority than
the RMT refill ISR and routinely preempt for longer, leaving the data
line idle past the ~300us LED latch threshold and producing ghost
pixels at 8-pixel intervals.

On chips with DMA-capable RMT (ESP32-S3, ESP32-P4), enable
flags.with_dma and request a generous DMA buffer; DMA decouples the
buffer from RMT channel memory and from ISR refill timing entirely.

On chips without DMA support (ESP32, S2, C3, C6, H2, C5), request the
maximum mem_block_symbols a single TX channel can borrow from its
group (SOC_RMT_TX_CANDIDATES_PER_GROUP * SOC_RMT_MEM_WORDS_PER_CHANNEL),
giving the ISR the most slack each chip can provide.

Also removes NEOPIXELBUS_RMT_INT_FLAGS, a leftover macro from the
legacy IDF v3/v4 driver that is unused by this IDF v5 channel API.

Fixes #921

Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
---
 .../methods/ESP/ESP32/NeoEsp32RmtXMethod.h        | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
index c7c7a3c3..72a2415d 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
@@ -59,9 +59,6 @@ struct rmt_led_strip_encoder_t
     rmt_symbol_word_t reset_code;
 };
 
-#define NEOPIXELBUS_RMT_INT_FLAGS (ESP_INTR_FLAG_LOWMED)
-
-
 template<typename T_SPEED, typename T_INVERTED = NeoEsp32RmtNotInverted> class NeoEsp32RmtMethodBase
 {
 public:
@@ -103,11 +100,19 @@ template<typename T_SPEED, typename T_INVERTED = NeoEsp32RmtNotInverted> class N
         rmt_tx_channel_config_t config = {};
         config.clk_src = RMT_CLK_SRC_DEFAULT;
         config.gpio_num = static_cast<gpio_num_t>(_pin);
-        config.mem_block_symbols = 192;         // memory block size, 64 * 4 = 256 Bytes
+#if SOC_RMT_SUPPORT_DMA
+        config.mem_block_symbols = 512;         // DMA decouples the buffer from RMT memory, so this is just a sane DMA buffer size
+#else
+        config.mem_block_symbols = SOC_RMT_TX_CANDIDATES_PER_GROUP * SOC_RMT_MEM_WORDS_PER_CHANNEL; // max symbols a single TX channel can borrow from all TX-capable channels in its group: 512 on original ESP32 (8x64), 96 on ESP32-C3 (2x48). Requesting more than this fails rmt_new_tx_channel with "no free tx channels" since there is no contiguous free memory to satisfy it. A bigger half-buffer gives the RMT ISR more slack against BLE-induced preemption before the WS2811/WS2812x 300 µs reset threshold is hit, so we ask for the most each chip can give.
+#endif
         config.resolution_hz = T_SPEED::RmtTicksPerSecond; // 1 MHz tick resolution, i.e., 1 tick = 1 µs
         config.trans_queue_depth = 4;           // set the number of transactions that can pend in the background
         config.flags.invert_out = T_INVERTED::Inverted;  // do not invert output signal
-        config.flags.with_dma = false;          // do not need DMA backend
+#if SOC_RMT_SUPPORT_DMA
+        config.flags.with_dma = true;           // chips with small per-channel RMT memory (e.g. ESP32-S3: 48 words/channel) can't fit a large static block; DMA decouples the buffer from RMT memory and from ISR refill timing entirely
+#else
+        config.flags.with_dma = false;          // chips without DMA support (original ESP32, ESP32-C3) use the static block sized above
+#endif
 
         ret += rmt_new_tx_channel(&config, &_channel);
         led_strip_encoder_config_t encoder_config = {};

From 8d6a6ebe3239088f41321599e8b8dddb17cd7db2 Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Thu, 20 Aug 2026 23:05:24 +0200
Subject: [PATCH 17/18] resolve conflicts

---
 src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c |  2 +-
 src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h |  6 ++++++
 src/internal/methods/ESP/NeoEspBitBangMethod.cpp    | 11 ++++++-----
 3 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
index 87f46256..0f7a03f9 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
@@ -954,6 +954,6 @@ bool i2sGetClks(uint8_t bus_num,
 }
 #endif
 
-#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #endif // defined(ARDUINO_ARCH_ESP32)
diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
index d6d1f571..bff5ff75 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
@@ -437,7 +437,13 @@ class NeoEspLcdMonoBuffContext
                 .sibling_chan = NULL,
                 .direction = GDMA_CHANNEL_DIRECTION_TX,
                 .flags = {.reserve_sibling = 0}};
+#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
+            gdma_new_ahb_channel(&dma_chan_config, &_dmaChannel);
+#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
+            gdma_new_axi_channel(&dma_chan_config, &_dmaChannel);
+#else
             gdma_new_channel(&dma_chan_config, &_dmaChannel);
+#endif
             gdma_connect(_dmaChannel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_LCD, 0));
             gdma_strategy_config_t strategy_config = {.owner_check = false,
                                                         .auto_update_desc = false};
diff --git a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
index 09ad953f..59eea59d 100644
--- a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
+++ b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
@@ -48,7 +48,8 @@ static inline uint32_t getCycleCount(void)
 }
 
 // Interrupt lock class, used for RAII interrupt disabling
-class InterruptLock {
+class InterruptLock
+{
 #if defined(ARDUINO_ARCH_ESP32)
     portMUX_TYPE updateMux;
 #endif
@@ -63,7 +64,7 @@ class InterruptLock {
     }
 
     inline void unlock()
-    {        
+    {
 #if defined(ARDUINO_ARCH_ESP32)
         portEXIT_CRITICAL(&updateMux);
 #else
@@ -78,12 +79,12 @@ class InterruptLock {
         unlock();
         lock();
     }
-    
+
     inline InterruptLock()
 #if defined(ARDUINO_ARCH_ESP32)
         : updateMux(portMUX_INITIALIZER_UNLOCKED)
-#endif    
-    { 
+#endif
+    {
         lock();
     }
 

From 83740aad9c210252fbd8151a452c1679972f26ce Mon Sep 17 00:00:00 2001
From: Davide Perini <perini.davide@dpsoftware.org>
Date: Thu, 20 Aug 2026 23:30:04 +0200
Subject: [PATCH 18/18] resolve conflicts

---
 .../DotStarTest_Esp32Advanced.ino             |  5 +--
 .../DotStarTest_Esp32DmaSpi.ino               |  5 +--
 src/internal/NeoMethods.h                     |  2 +-
 src/internal/XMethods.h                       |  2 +-
 .../methods/ESP/ESP32/Core_2_x/Esp32_i2s.c    |  2 +-
 .../ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h    |  2 +-
 .../ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h   |  2 +-
 .../ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp  |  2 +-
 .../methods/ESP/ESP32/NeoEsp32LcdXMethod.h    |  6 ---
 .../methods/ESP/ESP32/NeoEsp32RmtXMethod.h    |  8 ++--
 .../methods/ESP/NeoEspBitBangMethod.cpp       | 11 +++---
 .../methods/Rp2040/NeoRp2040PioInstance.h     | 16 --------
 .../methods/Rp2040/NeoRp2040PioMonoProgram.h  | 17 ++-------
 .../methods/Rp2040/NeoRp2040x4Method.h        | 38 +------------------
 14 files changed, 23 insertions(+), 95 deletions(-)

diff --git a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
index 2d0de4ea..cd31da2b 100644
--- a/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
+++ b/examples/ESP32/DotStarTest_Esp32Advanced/DotStarTest_Esp32Advanced.ino
@@ -21,7 +21,6 @@
     // If you set useSpiAlternatePins true, then these pins will be used instead.  Any output-capable GPIO can be used.
     const uint8_t DotClockPin = 18;
     const uint8_t DotDataPin = 23;  
-    const uint8_t MisoUnusedPin = -1;
     const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false
 
     // for software bit bang (only use if neither SPI peripheral is available)
@@ -77,7 +76,7 @@ void setup()
 #if (USE_DEFAULT_SPI_PORT == 1)
     if (useSpiAlternatePins)
     {
-        strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin);
+        strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin);
     }
     else
     {
@@ -91,7 +90,7 @@ void setup()
 #if (USE_ALTERNATE_SPI_PORT == 1)
     if (useSpiAlternatePins2)
     {
-        strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2);
+        strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2);
     }
     else
     {
diff --git a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
index b370d88c..41ffdbac 100644
--- a/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
+++ b/examples/ESP32/DotStarTest_Esp32DmaSpi/DotStarTest_Esp32DmaSpi.ino
@@ -38,7 +38,6 @@
     // If you set useSpiAlternatePins true, then these pins will be used instead.  Any output-capable GPIO can be used.
     const uint8_t DotClockPin = 18;
     const uint8_t DotDataPin = 23;  
-    const uint8_t MisoUnusedPin = -1;
     const int8_t DotChipSelectPin = -1; // -1 means the chip select signal won't be output, freeing up one pin compared to useSpiAlternatePins=false
 
     // for software bit bang (only use if neither SPI peripheral is available)
@@ -90,7 +89,7 @@ void setup()
 #if (USE_DEFAULT_SPI_PORT == 1)
     if (useSpiAlternatePins)
     {
-        strip.Begin(DotClockPin, MisoUnusedPin, DotDataPin, DotChipSelectPin);
+        strip.Begin(DotClockPin, DotDataPin, DotDataPin, DotChipSelectPin);
     }
     else
     {
@@ -104,7 +103,7 @@ void setup()
 #if (USE_ALTERNATE_SPI_PORT == 1)
     if (useSpiAlternatePins2)
     {
-        strip2.Begin(DotClockPin2, MisoUnusedPin, DotDataPin2, DotChipSelectPin2);
+        strip2.Begin(DotClockPin2, DotDataPin2, DotDataPin2, DotChipSelectPin2);
     }
     else
     {
diff --git a/src/internal/NeoMethods.h b/src/internal/NeoMethods.h
index 19fcaf3b..0cce59b9 100644
--- a/src/internal/NeoMethods.h
+++ b/src/internal/NeoMethods.h
@@ -74,7 +74,7 @@ License along with NeoPixel.  If not, see
 #endif // ESP_IDF_VERSION_MAJOR < 5
 
 // once we have a core3 i2s, then fix this
-#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h"
 #include "methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h"
 #endif
diff --git a/src/internal/XMethods.h b/src/internal/XMethods.h
index 48ba7b4a..0a45d972 100644
--- a/src/internal/XMethods.h
+++ b/src/internal/XMethods.h
@@ -69,7 +69,7 @@ typedef NeoEsp32LcdX16Ws2812Method    X16Ws2812Method;
 typedef NeoEsp32LcdX16Lc8812Method    X16Lc8812Method;
 
 
-#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
+#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
 
 //----------------------------------------------------------
 typedef NeoEsp32RmtXWs2812xMethod   XWs2812xMethod;
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
index 0f7a03f9..87f46256 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
@@ -954,6 +954,6 @@ bool i2sGetClks(uint8_t bus_num,
 }
 #endif
 
-#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#endif //  !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #endif // defined(ARDUINO_ARCH_ESP32)
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
index fb9021c8..a3c181f6 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sMethod.h
@@ -28,7 +28,7 @@ License along with NeoPixel.  If not, see
 
 // ESP32 beyond C3 & S3 I2S is not supported yet 
 // due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 
 extern "C"
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
index f099620c..35934e96 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32I2sXMethod.h
@@ -28,7 +28,7 @@ License along with NeoPixel.  If not, see
 
 // ESP32 beyond C3 & S3 I2S is not supported yet 
 // due to significant changes to interface
-#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
+#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
 
 extern "C"
 {
diff --git a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
index b6e52bc8..687c3bf6 100644
--- a/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
+++ b/src/internal/methods/ESP/ESP32/Core_2_x/NeoEsp32RmtMethod.cpp
@@ -31,7 +31,7 @@ License along with NeoPixel.  If not, see
 
 #if ESP_IDF_VERSION_MAJOR < 5
 
-#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32H2)
+#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
 
 #include "../../../NeoSettings.h"
 #include "../../../NeoBusChannel.h"
diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
index bff5ff75..d6d1f571 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32LcdXMethod.h
@@ -437,13 +437,7 @@ class NeoEspLcdMonoBuffContext
                 .sibling_chan = NULL,
                 .direction = GDMA_CHANNEL_DIRECTION_TX,
                 .flags = {.reserve_sibling = 0}};
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
-            gdma_new_ahb_channel(&dma_chan_config, &_dmaChannel);
-#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
-            gdma_new_axi_channel(&dma_chan_config, &_dmaChannel);
-#else
             gdma_new_channel(&dma_chan_config, &_dmaChannel);
-#endif
             gdma_connect(_dmaChannel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_LCD, 0));
             gdma_strategy_config_t strategy_config = {.owner_check = false,
                                                         .auto_update_desc = false};
diff --git a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
index 06b2cfb8..72a2415d 100644
--- a/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
+++ b/src/internal/methods/ESP/ESP32/NeoEsp32RmtXMethod.h
@@ -45,8 +45,6 @@ extern "C"
 #include "esp_check.h"
 }
 
-static const char *TAG = "led_strip_rmt"; // TODO: Remove all TAG log stuff
-
 struct led_strip_encoder_config_t
 {
     uint32_t resolution; /*!< Encoder resolution, in Hz */
@@ -290,7 +288,7 @@ template<typename T_SPEED, typename T_INVERTED = NeoEsp32RmtNotInverted> class N
         bytes_encoder_config.bit1.val = bit1;
 
         bytes_encoder_config.flags.msb_first = 1; // WS2812 transfer bit order: G7...G0R7...R0B7...B0 - TODO: more checks
-\
+
         ESP_GOTO_ON_ERROR(rmt_new_bytes_encoder(&bytes_encoder_config, &led_encoder->bytes_encoder), err, "TEST_RMT", "create bytes encoder failed");
         ESP_GOTO_ON_ERROR(rmt_new_copy_encoder(&copy_encoder_config, &led_encoder->copy_encoder), err, "TEST_RMT", "create copy encoder failed");
 
@@ -366,7 +364,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedGs1903, NeoEsp32RmtInverted> NeoEs
 typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtInverted> NeoEsp32RmtX800KbpsInvertedMethod;
 typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtInverted> NeoEsp32RmtX400KbpsInvertedMethod;
 
-#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32S3)
+#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32S3)
 
 // Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT 
 // will switch to use RMT as the default method
@@ -401,6 +399,6 @@ typedef NeoEsp32RmtXWs2812xInvertedMethod Neo800KbpsInvertedMethod;
 typedef NeoEsp32RmtX400KbpsInvertedMethod Neo400KbpsInvertedMethod;
 
 
-#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C5)
+#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
 
 #endif
diff --git a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
index 59eea59d..09ad953f 100644
--- a/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
+++ b/src/internal/methods/ESP/NeoEspBitBangMethod.cpp
@@ -48,8 +48,7 @@ static inline uint32_t getCycleCount(void)
 }
 
 // Interrupt lock class, used for RAII interrupt disabling
-class InterruptLock
-{
+class InterruptLock {
 #if defined(ARDUINO_ARCH_ESP32)
     portMUX_TYPE updateMux;
 #endif
@@ -64,7 +63,7 @@ class InterruptLock
     }
 
     inline void unlock()
-    {
+    {        
 #if defined(ARDUINO_ARCH_ESP32)
         portEXIT_CRITICAL(&updateMux);
 #else
@@ -79,12 +78,12 @@ class InterruptLock
         unlock();
         lock();
     }
-
+    
     inline InterruptLock()
 #if defined(ARDUINO_ARCH_ESP32)
         : updateMux(portMUX_INITIALIZER_UNLOCKED)
-#endif
-    {
+#endif    
+    { 
         lock();
     }
 
diff --git a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
index 5fbb12ad..d51323b6 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
+++ b/src/internal/methods/Rp2040/NeoRp2040PioInstance.h
@@ -50,28 +50,12 @@ class NeoRp2040PioInstance1
     const PIO Instance;
 };
 
-#if NUM_PIOS == 3
-class NeoRp2040PioInstance2
-{
-public:
-    NeoRp2040PioInstance2() :
-        Instance(pio2)
-    {};
-
-    const PIO Instance;
-};
-#endif
-
 // dynamic channel support
 class NeoRp2040PioInstanceN
 {
 public:
     NeoRp2040PioInstanceN(NeoBusChannel channel) :
-#if NUM_PIOS == 2
         Instance(channel == NeoBusChannel_0 ? pio0 : pio1)
-#elif NUM_PIOS == 3
-        Instance(channel == NeoBusChannel_0 ? pio0 : (channel == NeoBusChannel_1 ? pio1 : pio2))
-#endif
     {
     }
     NeoRp2040PioInstanceN() = delete; // no default constructor
diff --git a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
index bcd6bfc2..6ac3fc0b 100644
--- a/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
+++ b/src/internal/methods/Rp2040/NeoRp2040PioMonoProgram.h
@@ -164,12 +164,7 @@ class NeoRp2040PioMonoProgram
 public:
     static inline uint add(PIO pio_instance)
     {
-        size_t index = 
-#if NUM_PIOS == 2
-                (pio_instance == pio0) ? 0 : 1;
-#elif NUM_PIOS == 3
-                (pio_instance == pio0) ? 0 : (pio_instance == pio1 ? 1 : 2);
-#endif
+        size_t index = (pio_instance == pio0) ? 0 : 1;
         if (s_loadedOffset[index] == c_ProgramNotLoaded)
         {
             assert(pio_can_add_program(pio_instance, &T_CADENCE::program));
@@ -208,16 +203,10 @@ class NeoRp2040PioMonoProgram
     }
 
 private:
-    static uint s_loadedOffset[NUM_PIOS]; // singlet instance of loaded program, one for each PIO hardware unit
+    static uint s_loadedOffset[2]; // singlet instance of loaded program, one for each PIO hardware unit
 };
 
 template<typename T_CADENCE>
-uint NeoRp2040PioMonoProgram<T_CADENCE>::s_loadedOffset[] = 
-#if NUM_PIOS == 2
-        {c_ProgramNotLoaded, c_ProgramNotLoaded};
-#elif NUM_PIOS == 3
-        {c_ProgramNotLoaded, c_ProgramNotLoaded, c_ProgramNotLoaded};
-#endif
-
+uint NeoRp2040PioMonoProgram<T_CADENCE>::s_loadedOffset[] = {c_ProgramNotLoaded, c_ProgramNotLoaded};
 
 #endif
diff --git a/src/internal/methods/Rp2040/NeoRp2040x4Method.h b/src/internal/methods/Rp2040/NeoRp2040x4Method.h
index 6969ade2..8ba02fe8 100644
--- a/src/internal/methods/Rp2040/NeoRp2040x4Method.h
+++ b/src/internal/methods/Rp2040/NeoRp2040x4Method.h
@@ -118,13 +118,13 @@ class NeoRp2040x4MethodBase
         if (_sizeData % 4 == 0)
         {
             // data is 4 byte aligned in size,
-            // use a 32 bit fifo word for efficiency
+            // use a 32 bit fifo word for effeciency
             fifoWordBits = 32;
         }
         else if (_sizeData % 2 == 0)
         {
             // data is 2 byte aligned in size,
-            // use a 16 bit fifo word for efficiency
+            // use a 16 bit fifo word for effeciency
             fifoWordBits = 16;
         }
         
@@ -364,23 +364,6 @@ typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance1> R
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance1> Rp2040x4Pio1400KbpsMethod;
 typedef Rp2040x4Pio1Ws2805Method Rp2040x4Pio1Ws2814Method;
 
-#if NUM_PIOS == 3
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2811Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2812xMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2816Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2805, NeoRp2040PioInstance2> Rp2040x4Pio2Ws2805Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedSk6812, NeoRp2040PioInstance2> Rp2040x4Pio2Sk6812Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1814, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1814Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1829, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1829Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1914, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tm1914Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedApa106, NeoRp2040PioInstance2> Rp2040x4Pio2Apa106Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTx1812, NeoRp2040PioInstance2> Rp2040x4Pio2Tx1812Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedGs1903, NeoRp2040PioInstance2> Rp2040x4Pio2Gs1903Method;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance2> Rp2040x4Pio2800KbpsMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance2> Rp2040x4Pio2400KbpsMethod;
-typedef Rp2040x4Pio2Ws2805Method Rp2040x4Pio2Ws2814Method;
-#endif
-
 // inverted
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstanceN, true> Rp2040x4NWs2811InvertedMethod;
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstanceN, true> Rp2040x4NWs2812xInvertedMethod;
@@ -427,23 +410,6 @@ typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance1, t
 typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance1, true> Rp2040x4Pio1400KbpsInvertedMethod;
 typedef Rp2040x4Pio1Ws2805InvertedMethod Rp2040x4Pio1Ws2814InvertedMethod;
 
-#if NUM_PIOS == 3
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2811, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2811InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2812xInvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2812x, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2816InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedWs2805, NeoRp2040PioInstance2, true> Rp2040x4Pio2Ws2805InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedSk6812, NeoRp2040PioInstance2, true> Rp2040x4Pio2Sk6812InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1814, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1814InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1829, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1829InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTm1914, NeoRp2040PioInstance2> Rp2040x4Pio2Tm1914InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedApa106, NeoRp2040PioInstance2, true> Rp2040x4Pio2Apa106InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedTx1812, NeoRp2040PioInstance2, true> Rp2040x4Pio2Tx1812InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeedGs1903, NeoRp2040PioInstance2, true> Rp2040x4Pio2Gs1903InvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed800Kbps, NeoRp2040PioInstance2, true> Rp2040x4Pio2800KbpsInvertedMethod;
-typedef NeoRp2040x4MethodBase<NeoRp2040PioSpeed400Kbps, NeoRp2040PioInstance2, true> Rp2040x4Pio2400KbpsInvertedMethod;
-typedef Rp2040x4Pio2Ws2805InvertedMethod Rp2040x4Pio2Ws2814InvertedMethod;
-#endif
-
 // PIO 1 method is the default method, and still x4 instances 
 typedef Rp2040x4Pio1Ws2812xMethod NeoWs2813Method;
 typedef Rp2040x4Pio1Ws2812xMethod NeoWs2812xMethod;