feat(cpu): add SiLU implementation

[voltjia]

Summary

• This PR adds a native CPU implementation of standard SiLU with float16, bfloat16, float32, float64, contiguous, and strided tensor support.

Motivation

The torch-infini PrivateUse1 plugin needs InfiniOps to expose Silu in CPU-only builds before it can register standard aten::silu while retaining its no-accelerator fallback. Without a CPU specialization, the generated public operator header omits Silu because no active CPU implementation exists. Adding the native CPU path makes the generated call surface available and keeps CPU fallback behavior consistent with accelerator builds.

Type of Change

• This is a feat that adds a new platform implementation for an existing operator.

Platforms Affected

• CPU behavior is affected.
• The existing Python binding now exposes SiLU on CPU.

Smoke Test Result

The exact commit 023f7fc15736464947281f0c638e6a319c7bdaa9 was built in accelerator-dev/nvidia:latest with WITH_CPU=ON, AUTO_DETECT_DEVICES=OFF, and AUTO_DETECT_BACKENDS=OFF against a CPU-only install of InfiniRT 95c70080f9551e61241110497d163dfcdf9dc7e7.

SiLU is intentionally not part of the minimal smoke selection because it exercises the existing elementwise operator path. The unchanged CPU smoke suite contained no test_silu.py cases and passed.

python -m pytest tests -m smoke --devices cpu -q
62 passed, 13 skipped, 4212 deselected in 3.46s.

The complete SiLU operator module also passed.

python -m pytest tests/test_silu.py --devices cpu -q
24 passed in 1.17s.

The modified C++ file passed clang-format.

Test Results on Supported Platforms

Platform	Affected	Build / Smoke Result	Full Result / Notes
CPU	Yes	The full CPU wheel build and unchanged smoke suite passed.	All 24 SiLU cases passed.

Benchmark / Performance Impact

No performance benchmark was run because this PR adds the missing correctness implementation and does not claim a performance improvement.

Notes for Reviewers

This PR is a prerequisite for registering standard aten::silu in torch-infini without breaking CPU-only builds or CPU fallback execution.