plat-stm32mp1: bumping to pinctrl framework

core/arch/arm/plat-stm32mp1/conf.mk

@@ -93,6 +93,7 @@ include core/arch/arm/cpu/cortex-a7.mk
 $(call force,CFG_DRIVERS_CLK,y)
 $(call force,CFG_DRIVERS_CLK_DT,y)
 $(call force,CFG_DRIVERS_GPIO,y)
+$(call force,CFG_DRIVERS_PINCTRL,y)
 $(call force,CFG_GIC,y)
 $(call force,CFG_INIT_CNTVOFF,y)
 $(call force,CFG_PSCI_ARM32,y)

core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.c

@@ -460,8 +460,8 @@ static void parse_regulator_fdt_nodes(void)
  * Return 0 on success, 1 if no PMIC node found and a negative value otherwise
  */
 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info,
-			      struct stm32_pinctrl **pinctrl,
-			      size_t *pinctrl_count,
+			      struct pinctrl_state **pinctrl_active,
+			      struct pinctrl_state **pinctrl_sleep,
 			      struct stm32_i2c_init_s *init)
 {
 	int pmic_node = 0;
@@ -493,8 +493,8 @@ static int dt_pmic_i2c_config(struct dt_node_info *i2c_info,
 	if (!i2c_info->reg)
 		return -FDT_ERR_NOTFOUND;
 
-	if (stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init,
-					 pinctrl, pinctrl_count))
+	if (stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init, pinctrl_active,
+					 pinctrl_sleep))
 		panic();
 
 	return 0;
@@ -510,17 +510,11 @@ static bool initialize_pmic_i2c(void)
 	int ret = 0;
 	struct dt_node_info i2c_info = { };
 	struct i2c_handle_s *i2c = &i2c_handle;
-	struct stm32_pinctrl *pinctrl = NULL;
-	size_t pin_count = 0;
 	struct stm32_i2c_init_s i2c_init = { };
 
-	ret = dt_pmic_i2c_config(&i2c_info, &pinctrl, &pin_count, &i2c_init);
-	if (ret < 0) {
-		EMSG("I2C configuration failed %d", ret);
+	if (dt_pmic_i2c_config(&i2c_info, &i2c->pinctrl, &i2c->pinctrl_sleep,
+			       &i2c_init))
 		panic();
-	}
-	if (ret)
-		return false;
 
 	/* Initialize PMIC I2C */
 	i2c->base.pa = i2c_info.reg;
@@ -533,9 +527,6 @@ static bool initialize_pmic_i2c(void)
 	i2c_init.analog_filter = true;
 	i2c_init.digital_filter_coef = 0;
 
-	i2c->pinctrl = pinctrl;
-	i2c->pinctrl_count = pin_count;
-
 	stm32mp_get_pmic();
 
 	ret = stm32_i2c_init(i2c, &i2c_init);
@@ -586,26 +577,26 @@ void stm32mp_put_pmic(void)
 
 static void register_non_secure_pmic(void)
 {
-	size_t n = 0;
+	size_t __maybe_unused n = 0;
 
 	/* Allow this function to be called when STPMIC1 not used */
 	if (!i2c_handle.base.pa)
 		return;
 
-	for (n = 0; n < i2c_handle.pinctrl_count; n++)
-		stm32mp_register_non_secure_gpio(i2c_handle.pinctrl[n].bank,
-						 i2c_handle.pinctrl[n].pin);
+	stm32mp_register_non_secure_pinctrl(i2c_handle.pinctrl);
+	if (i2c_handle.pinctrl_sleep)
+		stm32mp_register_non_secure_pinctrl(i2c_handle.pinctrl_sleep);
 
 	stm32mp_register_non_secure_periph_iomem(i2c_handle.base.pa);
 }
 
 static void register_secure_pmic(void)
 {
-	size_t n = 0;
+	size_t __maybe_unused n = 0;
 
-	for (n = 0; n < i2c_handle.pinctrl_count; n++)
-		stm32mp_register_secure_gpio(i2c_handle.pinctrl[n].bank,
-					     i2c_handle.pinctrl[n].pin);
+	stm32mp_register_secure_pinctrl(i2c_handle.pinctrl);
+	if (i2c_handle.pinctrl_sleep)
+		stm32mp_register_secure_pinctrl(i2c_handle.pinctrl_sleep);
 
 	stm32mp_register_secure_periph_iomem(i2c_handle.base.pa);
 	register_pm_driver_cb(pmic_pm, NULL, "stm32mp1-pmic");

core/arch/arm/plat-stm32mp1/main.c

@@ -8,6 +8,7 @@
 #include <config.h>
 #include <console.h>
 #include <drivers/gic.h>
+#include <drivers/pinctrl.h>
 #include <drivers/stm32_etzpc.h>
 #include <drivers/stm32_gpio.h>
 #include <drivers/stm32_iwdg.h>
@@ -578,3 +579,6 @@ static TEE_Result init_debug(void)
 }
 early_init_late(init_debug);
 #endif /* CFG_STM32_DEBUG_ACCESS */
+
+/* Some generic resources need to be unpaged */
+DECLARE_KEEP_PAGER(pinctrl_apply_state);

core/arch/arm/plat-stm32mp1/shared_resources.c

@@ -1,9 +1,10 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2017-2022, STMicroelectronics
+ * Copyright (c) 2017-2023, STMicroelectronics
  */
 
 #include <config.h>
+#include <drivers/pinctrl.h>
 #include <drivers/stm32_etzpc.h>
 #include <drivers/stm32_gpio.h>
 #include <drivers/stm32mp1_etzpc.h>
@@ -386,6 +387,54 @@ void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin)
 	}
 }
 
+void stm32mp_register_secure_pinctrl(struct pinctrl_state *pinctrl)
+{
+	unsigned int *bank = NULL;
+	unsigned int *pin = NULL;
+	size_t count = 0;
+	size_t n = 0;
+
+	stm32_gpio_pinctrl_bank_pin(pinctrl, NULL, NULL, &count);
+	if (!count)
+		return;
+
+	bank = calloc(count, sizeof(*bank));
+	pin = calloc(count, sizeof(*pin));
+	if (!bank || !pin)
+		panic();
+
+	stm32_gpio_pinctrl_bank_pin(pinctrl, bank, pin, &count);
+	for (n = 0; n < count; n++)
+		stm32mp_register_secure_gpio(bank[n], pin[n]);
+
+	free(bank);
+	free(pin);
+}
+
+void stm32mp_register_non_secure_pinctrl(struct pinctrl_state *pinctrl)
+{
+	unsigned int *bank = NULL;
+	unsigned int *pin = NULL;
+	size_t count = 0;
+	size_t n = 0;
+
+	stm32_gpio_pinctrl_bank_pin(pinctrl, NULL, NULL, &count);
+	if (!count)
+		return;
+
+	bank = calloc(count, sizeof(*bank));
+	pin = calloc(count, sizeof(*pin));
+	if (!bank || !pin)
+		panic();
+
+	stm32_gpio_pinctrl_bank_pin(pinctrl, bank, pin, &count);
+	for (n = 0; n < count; n++)
+		stm32mp_register_non_secure_gpio(bank[n], pin[n]);
+
+	free(bank);
+	free(pin);
+}
+
 static void lock_registering(void)
 {
 	registering_locked = true;

core/arch/arm/plat-stm32mp1/stm32_util.h

@@ -8,9 +8,11 @@
 
 #include <assert.h>
 #include <drivers/clk.h>
+#include <drivers/pinctrl.h>
 #include <drivers/stm32_bsec.h>
 #include <kernel/panic.h>
 #include <stdint.h>
+#include <tee_api_types.h>
 #include <types_ext.h>
 
 /* Backup registers and RAM utils */
@@ -255,6 +257,20 @@ void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin);
  */
 void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin);
 
+/*
+ * Register pin resource of a pin control state as a secure peripheral
+ * @bank: Bank of the target GPIO
+ * @pin: Bit position of the target GPIO in the bank
+ */
+void stm32mp_register_secure_pinctrl(struct pinctrl_state *pinctrl);
+
+/*
+ * Register pin resource of a pin control state as a non-secure peripheral
+ * @bank: Bank of the target GPIO
+ * @pin: Bit position of the target GPIO in the bank
+ */
+void stm32mp_register_non_secure_pinctrl(struct pinctrl_state *pinctrl);
+
 /* Return true if and only if resource @id is registered as secure */
 bool stm32mp_periph_is_secure(enum stm32mp_shres id);
 
@@ -298,6 +314,16 @@ static inline void stm32mp_register_non_secure_gpio(unsigned int bank __unused,
 {
 }
 
+static inline void
+stm32mp_register_secure_pinctrl(struct pinctrl_state *pinctrl __unused)
+{
+}
+
+static inline void
+stm32mp_register_non_secure_pinctrl(struct pinctrl_state *pinctrl __unused)
+{
+}
+
 static inline bool stm32mp_periph_is_secure(enum stm32mp_shres id __unused)
 {
 	return true;

core/drivers/crypto/se050/glue/i2c_stm32.c

@@ -5,6 +5,7 @@
  */
 
 #include <assert.h>
+#include <drivers/pinctrl.h>
 #include <drivers/stm32_i2c.h>
 #include <i2c_native.h>
 #include <kernel/boot.h>
@@ -33,7 +34,8 @@ TEE_Result native_i2c_transfer(struct rpc_i2c_request *req, size_t *bytes)
 }
 
 static int dt_i2c_bus_config(struct stm32_i2c_init_s *init,
-			     struct stm32_pinctrl **pctrl,  size_t *pcnt)
+			     struct pinctrl_state **pinctrl_active,
+			     struct pinctrl_state **pinctrl_sleep)
 {
 	const fdt32_t *cuint = NULL;
 	const char *path = NULL;
@@ -61,29 +63,26 @@ static int dt_i2c_bus_config(struct stm32_i2c_init_s *init,
 	else if (I2C_STANDARD_RATE != CFG_CORE_SE05X_BAUDRATE)
 		IMSG("SE05x ignoring CFG_CORE_SE05X_BAUDRATE, use built-in");
 
-	return stm32_i2c_get_setup_from_fdt(fdt, node, init, pctrl, pcnt);
+	return stm32_i2c_get_setup_from_fdt(fdt, node, init, pinctrl_active,
+					    pinctrl_sleep);
 }
 
 int native_i2c_init(void)
 {
 	struct stm32_i2c_init_s i2c_init = { };
-	struct stm32_pinctrl *pinctrl = NULL;
-	size_t pin_count = 0;
 
 	/* No need to re-initialize */
 	if (i2c.base.pa)
 		return 0;
 
 	/* Support only one device on the platform */
-	if (dt_i2c_bus_config(&i2c_init, &pinctrl, &pin_count))
+	if (dt_i2c_bus_config(&i2c_init, &i2c.pinctrl, &i2c.pinctrl_sleep))
 		return -1;
 
 	/* Probe the device */
 	i2c_init.own_address1 = SMCOM_I2C_ADDRESS;
 	i2c_init.digital_filter_coef = 0;
 	i2c_init.analog_filter = true;
-	i2c.pinctrl_count = pin_count;
-	i2c.pinctrl = pinctrl;
 
 	stm32_i2c_resume(&i2c);