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Bring the CC2 eMMC up in the mode that enumerates reliably on hardware (DDR52 @ 1.8 V, 52 MHz cap matching U-Boot) and add always-available-but-silent debug tooling: debugfs on both machines, auto-mounted at boot, with the CC2 dynamic-debug bootarg snippet parked in comments for easy re-enable.
The stock kernel DTS advertised HS200 @ 150 MHz, which failed tuning with -74 on the affected board and fell into repeated init attempts. U-Boot has always run 52 MHz DDR, so the cap aligns the kernel with the bootloader; measured actual card clock is 50 MHz (104 MHz module-clock request rounds to 100, divided by two for DDR). Verified live on hardware via
/sys/kernel/debug/mmc0/ios: timing spec 8 (mmc DDR52), 1.80 V, 4-bit, actual clock 50000000 Hz.recipes-kernel/linux/linux-mainline/elegoo-centauri-carbon2.dtsrecipes-kernel/linux/linux-mainline/cc2-mmc-debug.cfgCONFIG_DYNAMIC_DEBUG+CONFIG_DEBUG_FSrecipes-kernel/linux/linux-mainline/cc1-debugfs.cfgCONFIG_DEBUG_FSonlyrecipes-kernel/linux/linux-mainline_%.bbappendbitbake -e)recipes-core/base-files/files/centauri-carbon-{1,2}/fstabimages/files/centauri-carbon-2/sw-descriptionVerification:
bitbake cosmosgreen for both machines locally (CC2 6937 tasks, CC1 6991); per-machine.configasserts; DTB checked withfdtget; SWU2.01.01.05flashed to CC2 over A/B and booted — Klippy plus all four MCUs healthy,/datarw, zero eMMC errors in dmesg. No test suite exists for this layer; hardware flash is the integration check.