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chore: release v0.5.0 - #109

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release-plz-2026-09-18T16-38-45Z
Closed

chore: release v0.5.0#109
github-actions[bot] wants to merge 1 commit into
mainfrom
release-plz-2026-09-18T16-38-45Z

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@github-actions github-actions Bot commented Sep 18, 2026

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🤖 New release

  • vihaco-abi-derive: 0.4.0 -> 0.5.0
  • vihaco-abi: 0.4.0 -> 0.5.0 (⚠ API breaking changes)
  • vihaco-bytecode: 0.4.0 -> 0.5.0
  • vihaco-module: 0.4.0 -> 0.5.0
  • vihaco-parser: 0.4.0 -> 0.5.0
  • vihaco-parser-derive: 0.4.0 -> 0.5.0
  • vihaco-runtime-derive: 0.4.0 -> 0.5.0
  • vihaco-runtime: 0.4.0 -> 0.5.0 (✓ API compatible changes)
  • vihaco-stdlib: 0.4.0 -> 0.5.0
  • vihaco-syntax: 0.4.0 -> 0.5.0
  • vihaco: 0.4.0 -> 0.5.0 (✓ API compatible changes)
  • vihaco-cpu: 0.4.0 -> 0.5.0 (⚠ API breaking changes)

⚠ vihaco-abi breaking changes

--- failure enum_no_repr_variant_discriminant_changed: enum variant had its discriminant change value ---

Description:
The enum's variant had its discriminant value change. This breaks downstream code that used its value via a numeric cast like `as isize`.
        ref: https://doc.rust-lang.org/reference/items/enumerations.html#assigning-discriminant-values
       impl: https://github.com/obi1kenobi/cargo-semver-checks/tree/v0.50.0/src/lints/enum_no_repr_variant_discriminant_changed.ron

Failed in:
  variant OperandKind::F64 3 -> 4 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/instruction_syntax.rs:10
  variant OperandKind::Bool 4 -> 6 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/instruction_syntax.rs:12
  variant OperandKind::String 5 -> 7 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/instruction_syntax.rs:13
  variant OperandKind::Symbol 6 -> 8 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/instruction_syntax.rs:14
  variant OperandKind::Custom 7 -> 9 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/instruction_syntax.rs:15
  variant Type::U32 4 -> 5 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:62
  variant Type::U64 5 -> 6 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:63
  variant Type::F64 6 -> 7 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:64
  variant Type::FunctionRef 7 -> 9 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:66
  variant Type::HeapRef 8 -> 10 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:67
  variant Type::U32 4 -> 5 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:62
  variant Type::U64 5 -> 6 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:63
  variant Type::F64 6 -> 7 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:64
  variant Type::FunctionRef 7 -> 9 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:66
  variant Type::HeapRef 8 -> 10 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:67
  variant Type::U32 4 -> 5 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:62
  variant Type::U64 5 -> 6 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:63
  variant Type::F64 6 -> 7 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:64
  variant Type::FunctionRef 7 -> 9 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:66
  variant Type::HeapRef 8 -> 10 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:67

--- failure enum_variant_added: enum variant added on exhaustive enum ---

Description:
A publicly-visible enum without #[non_exhaustive] has a new variant.
        ref: https://doc.rust-lang.org/cargo/reference/semver.html#enum-variant-new
       impl: https://github.com/obi1kenobi/cargo-semver-checks/tree/v0.50.0/src/lints/enum_variant_added.ron

Failed in:
  variant OperandKind:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/instruction_syntax.rs:9
  variant OperandKind:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/instruction_syntax.rs:11
  variant Type:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:61
  variant Type:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:65
  variant Type:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:61
  variant Type:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:65
  variant Type:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:61
  variant Type:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:65
  variant Value:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:22
  variant Value:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:30
  variant Value:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:22
  variant Value:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:30
  variant Value:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:22
  variant Value:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-abi/src/value.rs:30

⚠ vihaco-cpu breaking changes

--- failure enum_no_repr_variant_discriminant_changed: enum variant had its discriminant change value ---

Description:
The enum's variant had its discriminant value change. This breaks downstream code that used its value via a numeric cast like `as isize`.
        ref: https://doc.rust-lang.org/reference/items/enumerations.html#assigning-discriminant-values
       impl: https://github.com/obi1kenobi/cargo-semver-checks/tree/v0.50.0/src/lints/enum_no_repr_variant_discriminant_changed.ron

Failed in:
  variant SurfaceType::U32 4 -> 5 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/instruction.rs:20
  variant SurfaceType::U64 5 -> 6 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/instruction.rs:22
  variant SurfaceType::F64 6 -> 7 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/instruction.rs:24
  variant SurfaceType::FunctionRef 7 -> 9 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/instruction.rs:28
  variant SurfaceType::HeapRef 8 -> 10 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/instruction.rs:30

--- failure enum_variant_added: enum variant added on exhaustive enum ---

Description:
A publicly-visible enum without #[non_exhaustive] has a new variant.
        ref: https://doc.rust-lang.org/cargo/reference/semver.html#enum-variant-new
       impl: https://github.com/obi1kenobi/cargo-semver-checks/tree/v0.50.0/src/lints/enum_variant_added.ron

Failed in:
  variant SurfaceType:I32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/instruction.rs:18
  variant SurfaceType:F32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/instruction.rs:26
  variant Instruction:LoadI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadBool in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreBool in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstBool in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstString in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstFunctionRef in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstHeapRef in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:AddI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:121
  variant Instruction:AddF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:123
  variant Instruction:AddI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:125
  variant Instruction:AddU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:127
  variant Instruction:AddU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:129
  variant Instruction:AddF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:131
  variant Instruction:SubI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:133
  variant Instruction:SubI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:135
  variant Instruction:SubU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:137
  variant Instruction:SubU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:139
  variant Instruction:SubF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:141
  variant Instruction:SubF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:143
  variant Instruction:MulI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:145
  variant Instruction:MulI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:147
  variant Instruction:MulU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:149
  variant Instruction:MulU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:151
  variant Instruction:MulF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:153
  variant Instruction:MulF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:155
  variant Instruction:DivI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:157
  variant Instruction:DivI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:159
  variant Instruction:DivU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:161
  variant Instruction:DivU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:163
  variant Instruction:DivF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:165
  variant Instruction:DivF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:167
  variant Instruction:RemI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:169
  variant Instruction:RemI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:171
  variant Instruction:RemU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:173
  variant Instruction:RemU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:175
  variant Instruction:RemF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:177
  variant Instruction:RemF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:179
  variant Instruction:NegI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:181
  variant Instruction:NegI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:183
  variant Instruction:NegF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:185
  variant Instruction:NegF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:187
  variant Instruction:ShlI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:189
  variant Instruction:ShlI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:191
  variant Instruction:ShlU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:193
  variant Instruction:ShlU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:195
  variant Instruction:ShrI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:197
  variant Instruction:ShrI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:199
  variant Instruction:ShrU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:201
  variant Instruction:ShrU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:203
  variant Instruction:RolI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:205
  variant Instruction:RolI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:207
  variant Instruction:RolU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:209
  variant Instruction:RolU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:211
  variant Instruction:RorI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:213
  variant Instruction:RorI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:215
  variant Instruction:RorU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:217
  variant Instruction:RorU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:219
  variant Instruction:BitAndI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:221
  variant Instruction:BitAndI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:223
  variant Instruction:BitAndU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:225
  variant Instruction:BitAndU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:227
  variant Instruction:BitOrI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:229
  variant Instruction:BitOrI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:231
  variant Instruction:BitOrU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:233
  variant Instruction:BitOrU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:235
  variant Instruction:BitXorI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:237
  variant Instruction:BitXorI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:239
  variant Instruction:BitXorU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:241
  variant Instruction:BitXorU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:243
  variant Instruction:EqI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:254
  variant Instruction:EqI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:256
  variant Instruction:EqU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:258
  variant Instruction:EqU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:260
  variant Instruction:EqF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:262
  variant Instruction:EqF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:264
  variant Instruction:NeI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:266
  variant Instruction:NeI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:268
  variant Instruction:NeU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:270
  variant Instruction:NeU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:272
  variant Instruction:NeF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:274
  variant Instruction:NeF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:276
  variant Instruction:LtI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:278
  variant Instruction:LtI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:280
  variant Instruction:LtU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:282
  variant Instruction:LtU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:284
  variant Instruction:LtF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:286
  variant Instruction:LtF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:288
  variant Instruction:GtI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:290
  variant Instruction:GtI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:292
  variant Instruction:GtU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:294
  variant Instruction:GtU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:296
  variant Instruction:GtF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:298
  variant Instruction:GtF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:300
  variant Instruction:LeI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:302
  variant Instruction:LeI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:304
  variant Instruction:LeU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:306
  variant Instruction:LeU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:308
  variant Instruction:LeF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:310
  variant Instruction:LeF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:312
  variant Instruction:GeI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:314
  variant Instruction:GeI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:316
  variant Instruction:GeU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:318
  variant Instruction:GeU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:320
  variant Instruction:GeF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:322
  variant Instruction:GeF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:324
  variant Instruction:LoadI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:LoadBool in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:StoreBool in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstBool in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstString in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstFunctionRef in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:ConstHeapRef in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:11
  variant Instruction:AddI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:121
  variant Instruction:AddF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:123
  variant Instruction:AddI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:125
  variant Instruction:AddU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:127
  variant Instruction:AddU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:129
  variant Instruction:AddF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:131
  variant Instruction:SubI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:133
  variant Instruction:SubI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:135
  variant Instruction:SubU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:137
  variant Instruction:SubU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:139
  variant Instruction:SubF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:141
  variant Instruction:SubF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:143
  variant Instruction:MulI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:145
  variant Instruction:MulI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:147
  variant Instruction:MulU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:149
  variant Instruction:MulU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:151
  variant Instruction:MulF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:153
  variant Instruction:MulF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:155
  variant Instruction:DivI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:157
  variant Instruction:DivI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:159
  variant Instruction:DivU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:161
  variant Instruction:DivU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:163
  variant Instruction:DivF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:165
  variant Instruction:DivF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:167
  variant Instruction:RemI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:169
  variant Instruction:RemI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:171
  variant Instruction:RemU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:173
  variant Instruction:RemU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:175
  variant Instruction:RemF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:177
  variant Instruction:RemF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:179
  variant Instruction:NegI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:181
  variant Instruction:NegI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:183
  variant Instruction:NegF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:185
  variant Instruction:NegF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:187
  variant Instruction:ShlI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:189
  variant Instruction:ShlI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:191
  variant Instruction:ShlU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:193
  variant Instruction:ShlU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:195
  variant Instruction:ShrI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:197
  variant Instruction:ShrI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:199
  variant Instruction:ShrU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:201
  variant Instruction:ShrU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:203
  variant Instruction:RolI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:205
  variant Instruction:RolI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:207
  variant Instruction:RolU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:209
  variant Instruction:RolU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:211
  variant Instruction:RorI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:213
  variant Instruction:RorI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:215
  variant Instruction:RorU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:217
  variant Instruction:RorU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:219
  variant Instruction:BitAndI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:221
  variant Instruction:BitAndI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:223
  variant Instruction:BitAndU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:225
  variant Instruction:BitAndU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:227
  variant Instruction:BitOrI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:229
  variant Instruction:BitOrI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:231
  variant Instruction:BitOrU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:233
  variant Instruction:BitOrU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:235
  variant Instruction:BitXorI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:237
  variant Instruction:BitXorI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:239
  variant Instruction:BitXorU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:241
  variant Instruction:BitXorU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:243
  variant Instruction:EqI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:254
  variant Instruction:EqI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:256
  variant Instruction:EqU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:258
  variant Instruction:EqU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:260
  variant Instruction:EqF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:262
  variant Instruction:EqF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:264
  variant Instruction:NeI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:266
  variant Instruction:NeI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:268
  variant Instruction:NeU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:270
  variant Instruction:NeU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:272
  variant Instruction:NeF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:274
  variant Instruction:NeF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:276
  variant Instruction:LtI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:278
  variant Instruction:LtI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:280
  variant Instruction:LtU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:282
  variant Instruction:LtU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:284
  variant Instruction:LtF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:286
  variant Instruction:LtF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:288
  variant Instruction:GtI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:290
  variant Instruction:GtI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:292
  variant Instruction:GtU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:294
  variant Instruction:GtU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:296
  variant Instruction:GtF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:298
  variant Instruction:GtF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:300
  variant Instruction:LeI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:302
  variant Instruction:LeI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:304
  variant Instruction:LeU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:306
  variant Instruction:LeU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:308
  variant Instruction:LeF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:310
  variant Instruction:LeF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:312
  variant Instruction:GeI32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:314
  variant Instruction:GeI64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:316
  variant Instruction:GeU32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:318
  variant Instruction:GeU64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:320
  variant Instruction:GeF32 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:322
  variant Instruction:GeF64 in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/data.rs:324

--- failure enum_variant_missing: pub enum variant removed or renamed ---

Description:
A publicly-visible enum has at least one variant that is no longer available under its prior name. It may have been renamed or removed entirely.
        ref: https://doc.rust-lang.org/cargo/reference/semver.html#item-remove
       impl: https://github.com/obi1kenobi/cargo-semver-checks/tree/v0.50.0/src/lints/enum_variant_missing.ron

Failed in:
  variant Instruction::Load, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Store, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Const, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Add, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Sub, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Mul, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Div, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Rem, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Neg, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Shl, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Shr, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Rol, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Ror, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::BitAnd, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::BitOr, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::BitXor, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Eq, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Ne, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Lt, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Gt, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Le, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Ge, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Load, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Store, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Const, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Add, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Sub, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Mul, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Div, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Rem, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Neg, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Shl, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Shr, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Rol, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Ror, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::BitAnd, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::BitOr, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::BitXor, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Eq, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Ne, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Lt, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Gt, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Le, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12
  variant Instruction::Ge, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/data.rs:12

--- failure inherent_method_missing: pub method removed or renamed ---

Description:
A publicly-visible method or associated fn is no longer available under its prior name. It may have been renamed or removed entirely.
        ref: https://doc.rust-lang.org/cargo/reference/semver.html#item-remove
       impl: https://github.com/obi1kenobi/cargo-semver-checks/tree/v0.50.0/src/lints/inherent_method_missing.ron

Failed in:
  CPU::execute_instruction, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:27
  CPU::op_add, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:779
  CPU::op_sub, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:780
  CPU::op_mul, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:781
  CPU::op_div, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:782
  CPU::op_rem, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:783
  CPU::op_neg, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:785
  CPU::op_shl, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:845
  CPU::op_shr, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:846
  CPU::op_rol, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:889
  CPU::op_ror, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:890
  CPU::op_bitand, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:933
  CPU::op_bitor, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:934
  CPU::op_bitxor, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:935
  CPU::op_not, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:951
  CPU::op_and, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:957
  CPU::op_or, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:958
  CPU::op_xor, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:959
  CPU::op_eq, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:990
  CPU::op_ne, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:991
  CPU::op_lt, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:1036
  CPU::op_le, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:1037
  CPU::op_gt, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:1038
  CPU::op_ge, previously in file /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:1039

--- failure method_parameter_count_changed: pub method parameter count changed ---

Description:
A publicly-visible method now takes a different number of parameters, not counting the receiver (self) parameter.
        ref: https://doc.rust-lang.org/cargo/reference/semver.html#fn-change-arity
       impl: https://github.com/obi1kenobi/cargo-semver-checks/tree/v0.50.0/src/lints/method_parameter_count_changed.ron

Failed in:
  vihaco_cpu::CPU::op_store takes 2 parameters in /tmp/.tmpuu2KLd/vihaco-cpu/src/component.rs:229, but now takes 1 parameters in /tmp/.tmpNmqv4h/vihaco/crates/vihaco-cpu/src/component.rs:330
Changelog

vihaco

0.5.0 - 2026-09-18

Other

  • Changed CPU to use u64 as its value (#85)
  • Change stack.pop() error check in op_conditional_branch to be lazy (#83)
  • Changed expect_exactly_one_effect to perform a match on variants instead of building iterators (#88)

This PR was generated with release-plz.

@kaihsin kaihsin closed this Sep 18, 2026
@github-actions

github-actions Bot commented Sep 18, 2026

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PR Preview Action v1.8.1
Preview removed because the pull request was closed.
2026-09-18 17:11 UTC

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@kaihsin