arch/x86_64: support more than 4 CPU - #19947
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The AP boot path masked RSP with ~XCPTCONTEXT_SIZE, which just clears whichever bits happen to be set in the size (0x340 -> mask 0xfffffcbf). That drops RSP by an arbitrary amount and only guarantees 16-byte alignment, while the XSAVE area in the context needs 64. Mask with ~(XCPTCONTEXT_ALIGN - 1) instead. Signed-off-by: raiden00pl <raiden00@railab.me> Assisted-by: Claude Code
intel64 port explicitly enumerates five idle-stack addresses and rejects configurations with more than five CPUs. Store the CPU0 stack top and calculate every CPU stack address from its index. Signed-off-by: raiden00pl <raiden00@railab.me> Assisted-by: Claude Code
The idle stack area started at _ebss + CONFIG_IDLETHREAD_STACKSIZE * CONFIG_SMP_NCPUS, so the first CONFIG_SMP_NCPUS stack slots after .bss were never used - 16MiB on a 4-CPU configuration with a 4MiB idle stack. Start the area at _ebss and let the heap begin that much earlier. The -16 offset is kept: it is what places the AP initial RSP set up in intel64_head.S below the xcp->regs block that up_cpu_idlestack() reserves at the top of the same stack. Without it both land on the same 64-byte slot and the first context save corrupts the AP stack. Signed-off-by: raiden00pl <raiden00@railab.me> Assisted-by: Claude Code
jerpelea
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Aug 24, 2026
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Arch: x86_64
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Summary
Impact
support more than 4 CPU for intel64
Testing
intel64 with 12 CPUs enabled