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fix(shader): preserve flat aliases in barycentric emulation - #12619
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@CorruptName could you drop the new expected-rejection loop in CheckMixedAlias (PixelBarycentricEmulation.cpp, lines 428-438) and keep the positive mixed-alias pixel checks? It requires P10/first and P20/last to throw with "not measured". Our standing test rule is to test supported behavior and argument validation, without pinning a valid unimplemented form to throw, because that breaks when the form is implemented. This asks only to remove those new assertions; the runtime support guard can stay. Please retain the supported interpolation/provoking cases and cache-enabled/disabled validation coverage. |
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Some comparisons could not be completed because a pull request conflicts with the base branch. Review these shared files manually before concluding that there is no overlap.
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✅ NVIDIA GPU test: passedPR head
Unstable on main (1, these also failed in recent main runs on this machine; not counted against this PR)Failing on main too (5, not counted against this PR)Validation IDs already present on main (4 IDs in 405 tests)Skipped (39)ReproduceAutomated build and test on a contributor's NVIDIA machine; it does not replace upstream CI. A new comment is posted for each new push. Full logs. |
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A Windows run with AMD's own driver, since the GPUs tested are RADV on Linux: AMD RDNA 4, Windows 11 Pro 10.0.22631, AMD Radeon RX 9070 XT (
AI-assisted: yes (Claude Code) |
What
A flat fragment input that aliases the export slot of a smooth input is promoted to a per-vertex array on the barycentric-emulation path. A flat P10 read then takes the vertex-delta path instead of the existing flat-value path. Primitive-constant values become zero; unequal vertices produce the wrong value too.
Keep the flat alias separate from the relocated per-vertex input in input collection, fragment-parameter descriptors and SPIR-V variable binding. Generated geometry/tessellation stages already forward both forms. Validate the existing provoking-vertex restrictions before pipeline-cache lookup: supported and unsupported guest interpolation modes can emit identical host SPIR-V, so constructor-only validation can be bypassed by a cache hit.
The existing PixelBarycentricEmulation fixture now uses unequal vertex values and smooth/flat aliases of the same export slot. It checks the flat value exactly in R/B/A, independently computes perspective interpolation for G, covers supported P10/P20/P0 and first/last-provoking combinations, and warms compatible pipelines before checking both unsupported combinations.
This preserves existing instruction semantics and their support boundary, documented in
docs/dev/debt/libSceAgcDriver.md(the provoking-vertex entry and ps5-opengl #1413). It does not claim a new PS5 hardware-oracle measurement. Native fragment-barycentric mixed aliases, mesh-path aliases and mixed-alias rect lists are outside the new regression coverage. No performance improvement is claimed.Provenance: the changes and regression were developed against AnyPS5 and retain its GPL-2.0 license. No third-party implementation, application assets, captured guest shaders, executables or external project files are added. AI assistance was used for analysis, implementation, test orchestration and this description.
Tested
Linux hardware comparison on AMD BC-250 (RADV GFX1013, PCI 1002:13fe), Mesa/RADV 26.2.5, CachyOS kernel 7.3.0-4-cachyos; Khronos validation layer 1.4.363. GCC 16.2.1, CMake 4.4.5, Ninja 1.13.2. Separate checkout/build; no changes to driver or hardware settings.
Baseline:
66248d1d5de390f57df82df2b27b8834996ada7a. Candidate:a582c98640dc9593fe179dbcfde6aededa7854f7.Four focused CTests:
agc_driver_pixel_barycentric_emulation,agc_driver_zero_position_vertex,agc_driver_provoking_vertex,agc_driver_pixel_exec_interpolation. Each is run on the same GPU with the following environment and with the pipeline cache both enabled and disabled:66248d1d5da582c98640All four verbose logs confirm the BC-250 selection, contain zero
VUID-orValidation Errormessages, and do not containwas not found but was requested by env var VK_INSTANCE_LAYERS. No selected tests were skipped. The candidate therefore adds no validation diagnostics compared with main.The new fixture checks eight positive cases (four per geometry/tessellation route), each covering 932 interior pixels, and four expected rejections. Equal vertex colors cannot hide the regression. Checks with the candidate's new fixture on
c9207624without implementation changes fail at P10/last withactual=3.050000(expected-0.25). A separate control with only the pre-cache validation call removed fails withmixed alias bypassed an unmeasured provoking-vertex restrictionwhen caching is enabled, but passes when it is disabled. Both controls were confined to the test checkout and restored before the final run.Native
VK_KHR_fragment_shader_barycentricmixed aliases and mixed-alias rect-list/mesh paths are not validated here. No Windows run, full-suite run or timing/performance claim is made. The existing focused tests include rect-list and non-emulated interpolation checks; these do not establish mixed-alias coverage for those other paths.python3 tools/check_conventions.py --base origin/mainandgit diff --checkpass.tools/pr_overlap.py --branch fix/flat-smooth-input-aliaswas run against upstream. It found no comparable overlapping lines, but reported shared files in conflicting PRs #5609, #5925, #6235, #6970, #7275, #7642, #8004, #9020, #9335, #9356, #9387, #9489, #9508, #9748 and #10193. Their affected hunks were inspected: they concern cache/prebuild work, descriptors, mesh fallbacks, output formats, line modes or subgroup changes rather than this alias correction. In particular #5925 edits CachedPipeline but does not add this pre-lookup support validation. No dependency on those changes is required.Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file.mdfiles or images added to the repository (attach them to this PR)