[TheAggie]

What

Three register fields that Mesa sets on every GFX10 draw were rejected, so the draw was skipped. None of them changes what is rendered. They only tune how the hardware spreads work across render backends and waves, and the Vulkan path has nothing equivalent to them. Field names and bit positions are from Mesa's src/amd/registers/gfx10.json.

Register	Field	Mesa
PA_SC_MODE_CNTL_0 (0x28a48) bit 5	ALTERNATE_RBS_PER_TILE	radeonsi si_state.c sets S_028A48_ALTERNATE_RBS_PER_TILE(gfx_level >= GFX9) next to VPORT_SCISSOR_ENABLE(1); RADV radv_cmd_buffer.c does the same
CB_COLOR_CONTROL (0x28808) bit 0	DISABLE_DUAL_QUAD	RADV sets it on RB+ parts for dual-source blending and logic ops ("RB+ doesn't work with dual source blending and logic op"); radeonsi sets it on GFX11 for blending performance
VGT_SHADER_STAGES_EN (0x28b54) bits 18:15	MAX_PRIMGRP_IN_WAVE	radeonsi si_state_shaders.cpp / si_state_draw.cpp and RADV radv_cmd_buffer.c set it to 2 on GFX9+

• ScanModeMask accepts bit 5 next to VPORT_SCISSOR_ENABLE.
• colorControlSupported ignores bit 0.
• The vertex-path stage mask accepts bits 18:15. The geometry and tessellation masks already accept them.
• agc_driver_graphics (TuningFieldTests): each field decodes and passes DrawRejection with the same state as without it. The neighbouring LINE_STIPPLE_ENABLE bit and a nonzero CB_COLOR_CONTROL bit 1 are still rejected. ShaderStageTests no longer lists bit 15 as unsupported. The new test fails on main (scan conversion mode is unsupported (register 0x292 = 0x00000022)).

colorControlSupported is also changed by #1414, one line apart. Whichever PR merges second needs a trivial rebase. #1189 extends ScanModeMask for MSAA_ENABLE and works with this change as is.

Tested

Windows 11 Pro (26200), MinGW-w64 GCC 15.2.0 (WinLibs r7), Release, NVIDIA GeForce RTX 5070 Ti.

• All 200 agc_* and shader_* tests pass. They were run from the generated CTestTestfile.cmake commands, because antivirus blocks ctest.exe on this machine.
• ps5-opengl (blackbearreloaded/ps5-opengl, Mesa 26.2 on AGC) writes PA_SC_MODE_CNTL_0 0x22/0x23 ("preserve the canonical viewport-scissor and alternate-RB baseline") and CB_COLOR_CONTROL 0x00cc0011 by default, so every draw from Homebrew UI Lab (PPSA99050) and the PS5 OpenGL Showcase (PPSA99005) hit these checks. The Showcase's vertex-path draws also use VGT_SHADER_STAGES_EN 0x02012010 (MAX_PRIMGRP_IN_WAVE = 2), from its shader package metadata. With this change, fix(recompiler): give vertex-path shaders a full NGG merged wave info #1412, fix(agc): render CB_COLOR_CONTROL mode disable as a draw without color #1414, fix(agc): accept the sampler ANISO_OVERRIDE bit #1415 and other pending fixes on a local branch, both render. This change alone does not make them render.

Not tested on AMD, Intel or Linux.

Checklist

• Based on current main; no other open PR implements the same functions
• One topic per PR; follow-ups go in a new PR
• No comments in code except technical debt
• Unimplemented paths throw (NotImplemented_nid_no_patch); silent stubs are listed in TechnicalDebt
• No notes, investigation .md files or images added to the repository (attach them to this PR)
• New third-party code is a submodule built from source
• Generic behaviour, not specific to one title
• Depends on: none
• AI-assisted: yes

🤖 Generated with Claude Code

[github-actions]

Other open pull requests touch the same code. Merging one will break the other, or both implement the same thing. If this one builds on them, list them in Depends on.

Pull request	Conflicting files (lines on main)	Same exports	Same new files
#1425	core/libs/prx/libSceAgcDriver/tests/Graphics.cpp L611

[adriadam10]

Checked on Linux (RADV): build and ctest green on current main (agc_driver_graphics included). Reverting the State.cpp change makes TuningFieldTests fail, so the test pins the fix. Masks match the Mesa fields cited (0x0247a010 = old mask + bits 18:15, ScanModeMask ~0x22, bit 0 ignored in colorControlSupported), and neighbouring bits stay rejected. Merges cleanly with main; whoever lands second between this and #1414 needs the trivial rebase you mention. Merging.

[EdouardSence]

Tested on AMD under Linux, since this PR wasn't: RX 9070 XT (RDNA4, GFX1201), RADV / Mesa 26.2.4, Linux 7.2.9 (CachyOS), GCC Release build.

• ctest: this PR merged onto main 07c2405, all 452 tests pass with ctest -j8 (main alone: 452/452 on the same machine).

AI-assisted: the runs and this write-up were done by Claude (Claude Code) on my machine.