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feat(agc): add fragment-preserving R_X and Z_X layouts - #6588
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What
Shared CPU layout foundation requested in #6570 for sample-preserving native depth publication. Adds
MultisampleTextureLayout, including byte addresses, tile/detile and inverse block equations for single-mip 2D arrays with 2/4/8 fragments. R_X supports 1/2/4/8/16-byte elements; Z_X supports 1/2/4-byte elements. Fragment, layer and pipe/bank XOR contributions are retained. Transfers preserve element bytes and leave padding untouched; invalid shapes, unsupported modes and overlapping/short transfer buffers throw.The equations come from AMD Addrlib at c5e80007,
GFX10_SW_64K_{R,Z}_X_{2,4,8}xaa_PATINFO, row20 + log2(elementBytes): non-RB+ 16-pipe GFX10, 256-byte interleave. Pattern selection follows GetSwizzlePatternInfo; the implementation uses the documented X/Y/layer/fragment bit masks. Technical debt records the configuration and lack of PS5 hardware measurement.@simonbronk reports Onimusha: Way of the Sword (PPSA27836), after #6557, stopping at
AGC graphics: sample-preserving guest publication of native multisample depth is not implemented. This PR supplies the shared layout primitive for that work; it does not remove the refusal, read back native depth, implement HTILE publication, or claim a title unblock. Depth publication and the color readback/publication consumer remain separate follow-ups coordinated in #6570.Six files, one topic. Extracted from the retained experimental fork, adapted to current main. Reviewed related #6297 (uniform undrawn surfaces), #6146 (single-sample DB expand), #6444/#6445 (footprints), and open/merged searches for the new helper names; no equivalent shared fragment-aware address/transfer implementation found.
Tested
Source refresh — 2026-10-21
Head
b8297adab9, based on main745b3946294a9d79e1177a289482768d6ab88c9a. This supersedes the previous current-head labels in the historical qualification below.agc_driver_msaa_layoutpasses three fresh processes. The two helper headers, implementation and fixture are byte-identical to the previous published head; CMake/debt context is refreshed. Earlier GPU-consumer evidence keeps its original pins.2c4b116da9merges cleanly; this is source review, not a runtime result at that newer pin. Earlier Linux, full-build, hardware-reference and negative-control results retain their original pins. No new title or speed result.Earlier qualification at its recorded pins
Windows 11 Enterprise 10.0.26200; required WinLibs GCC 15.2.0 r7, Release, BUILD_TESTING=ON. Base `31cbb55d755585e3e87052f793dc3faccea4ecae`, submission `f506edb26f19cc668e1996752f554a28ee69de75`.GB_ADDR_CONFIG=196; this is a source oracle, not a console measurement.libsbuilds, conventions and registration pass at validation composition2edc249f8: submission plus only test(agc): align the indirect arguments block at run time #6452's independent Windows test-storage alignment correction. The current-main indirect fixture otherwise exceeds WinLibs' object-file alignment limit. No foreign dependency commit is bundled in this PR.agc_driver_graphicsruns per selector. Covers the new CPU layout test, existing sampled/native MSAA, depth clear/HTILE/storage/retirement, sample masks, staged reads and the alignment-dependent indirect fixture. No CTest failures, skips or timeouts; maximum 12.09 s. Physical GPU selection is verified in 13 NVIDIA and 13 AMD groups; CPU/mock groups are selector runs, not hardware coverage. Vulkan required, shader cache disabled, serial processes; no cold-driver-cache claim.containerOutOfBoundsadvisory at the inverse pivot swap. The short-circuit loop bounds the lookup, andRequire(pivot < 16u)throws before the swaps; the invalid-equation fault control reaches that guard. Inspected and recorded as a control-flow false positive; no suppression, auto-fix or formatting changes. Analyzer time 6.46 s (26.304 s including scanning).No fresh title launch, startup/FPS improvement or PS5 address-equivalence result is claimed. Selected Linux fixture coverage is recorded below; no full Linux application/suite claim. Maintainer-dispatched CI remains needed for other platforms.
Combined foundation refresh on main5d
Consumer foundation pin
82155cf97, handoff in #6570: main5d9dcc42d+ this layout helper + #6601 sampled reader + #6452's separate Windows test-build correction. This PR's layout header, implementation and fixture blobs are identical to the submitted head. Relative to the earlier6f91c1b6combined pin, only #6601's unsupported-count fixture handling changes; production code is unchanged.libs, conventions and registration pass. Five CPU layout processes plus 60 reader processes (six modes x five repetitions on each physical NVIDIA/AMD GPU), all pass; maximum 0.44 s. Hardware identities, drivers and OS are as above. CPU tests are not GPU evidence.The fixtures exercise the helpers separately, not a connected depth/HTILE publication path or a title. Historical Addrlib comparisons above retain their original source pin; the CPU layout fixture was rerun here.
Refreshed combined handoff
Combined checkpoint
185ef412fincludes main896e1b2b7with both shared foundations and the separate #6452 Windows test correction. The helper and fixture sources are unchanged from their submitted PR heads. The maintained #6570 handoff records fresh selected builds, 54 reader runs on NVIDIA/AMD/llvmpipe plus six CPU-layout runs, unsupported subcases, exact tested pins and the later CI-only main update. This is composition validation; the submitted head and its earlier full-build evidence remain separately pinned. Native depth/stencil publication, HTILE and title validation remain follow-up work.Checklist
maind047690c63; no other open PR implements the same functions; historical results retain their original source pins10de:2c02), driver 610.62 / 32.0.16.1062; AMD Radeon(TM) Graphics (1002:13c0), driver 32.0.21036.18; both Windows 11 Enterprise 26200. The added layout fixture is CPU-only