[DangerChamp]

What

Fixes #6582 by memoizing completed entry-lane proofs by value and proof type, while avoiding cached results that depend on active Phi cycles.

Adds regression coverage for saved EXEC-mask loops and helper-lane safety on wave64 shaders running on 32-lane host subgroups.

Tested

Windows host with MinGW Release build:

• agc_shader_memory passed
• git diff --check passed
• GPUs tested: not run

Checklist

• Based on current main; no other open PR implements the same functions
• One topic per PR; follow-ups go in a new PR
• No comments in code except technical debt
• Unimplemented paths throw
• No notes, investigation .md files or images added
• New third-party code is a submodule built from source
• Generic behaviour, not specific to one title
• Depends on: none
• Unblocks: none
• GPUs tested: not run
• AI-assisted: yes

[github-actions]

Other open pull requests touch the same code. Merging one will break the other, or both implement the same thing. If this one builds on them, list them in Depends on.

Pull request	Conflicting files (lines on main)	Same exports	Same new files
PR 8716	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp L22

Some comparisons could not be completed because a pull request conflicts with the base branch. Review these shared files manually before concluding that there is no overlap.

Pull request	Shared files not compared
PR 4072	core/shader/recompiler/SpirvBackend/src/SpirvAlu/SpirvAluEmitterMath.cpp
PR 5021	core/shader/recompiler/SpirvBackend/src/SpirvAlu/SpirvAluEmitterMath.cpp
PR 5371	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 6235	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 6412	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 6488	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 7642	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 7684	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 7803	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 8077	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 8429	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 8564	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 9020	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 9335	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 9356	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 9387	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 9508	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp
PR 9748	core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp

[cookie42073-cmd]

Hey @DangerChamp, I've been testing this same proof-cache path. EntryLaneWalk at e6f33ead matches the earlier published candidate apart from prove → Prove, including the 512-step budget and cycle guard.

There's a new reporter comparison worth linking here: the exact earlier candidate passes the NHL26 capture and added synthetic CPU controls, but the retained PRAGMATA request still exhausts its budget at 512. I haven't built your whole branch, so this isn't a run of #6645, but I don't think Fixes #6582 is demonstrated by the current evidence. Could we keep that claim pending a successful replay of that request?

The next comparison I'm requesting on #6582 is the same cached proof at 2,048 steps, with the cycle-safety checks unchanged. Can we coordinate this PR's ordering with @MarcZX100's #6180 before any further code submission? I'll keep our follow-up work coordinated here rather than open another matching PR.

AI-assisted investigation and write-up, independently reviewed.

[blawesom]

Rebase handoff — rebased onto current main cleanly (authorship unchanged).

Verified on Linux (CachyOS, kernel 7.2.9, GCC 16.2.1, Ninja, Release, BUILD_TESTING=ON, AMD RX 9070 XT / RADV):

• builds; tools/check_conventions.py --base origin/main passes
• full suite: 1338/1339 — the only failure is the known main regression (agc_driver_tessellation segfault, feat(shader): read hull inputs at a control-point index computed from data #4727), not this PR

To pick it up:

git fetch https://github.com/blawesom/AnyPS5 rebase/6645
git checkout <your branch>
git merge --ff-only FETCH_HEAD

Head is 13cde0efd.

[MarcZX10]

Coordination update from #6582: on refreshed main ca82d7d with the existing 2,048-step budget and SPIRV-Tools enabled, the retained PRAGMATA request fails on unmodified main with the lane-63 refusal, then passes with overlordxrz-source’s b76d8d31 EntryLaneWalk helper (534,483 optimized SPIR-V words; validation passes before and after optimization). Both public CPU controls pass on that comparison. This is stronger evidence for that captured failure than the older same-base 512-step comparison, but the live title still did not reach a confirmed menu/scene and hit host memory pressure. Since #6645 is already open for the same cache topic, I’m not opening a parallel PR. Could you and @overlordxrz-source coordinate whether to replace this implementation with the verified helper or rework #6645 against the refreshed capture?

[Ondra97]

I tested the current #6645 implementation against the retained #6582 shader request. After rebasing its original commit onto main 40393b0 and keeping #6180's 2,048-step budget, the request still failed with the lane-63 refusal (exit 1). An eight-round saved-EXEC CPU regression also failed; the PR's existing three-round test passed.

I prepared a branch for this PR at 99ed46c854a38e27f8c96abe6d83caa1fc30722c, based on main ccbd40240f. It preserves DangerChamp's original commit and tests, replaces the provisional cycle cache with overlordxrz-source's settled per-(value, proof) algorithm from b76d8d31, retains the 2,048-step budget, and extends the saved-EXEC test to eight rounds. The second commit credits the helper's source.

On Windows 11 Pro (Ryzen 9 7900X, RTX 4070 Ti SUPER, NVIDIA driver 32.0.16.1742), Release relinker, libs, and the affected test executables built. Four CPU CTests and the native agc_driver_pixel_wave_reduction test passed with no skips; that test selected the RTX GPU with subgroup size 32. The unchanged private request (SHA-256 a9f1f0318f46c97929ccebfffcfd8d9bebc8cbcfab132cabd4369bcc52f4a82e) replayed successfully, producing 491,708 SPIR-V words with SPIRV-Tools validation enabled. Conventions, whitespace, and main-sync checks passed. I did not run the title from this branch.

The hosted PR still points to e6f33ead and conflicts with main. This is a handoff for the existing PR, not a separate PR. Please review and coordinate whether to integrate the branch into #6645. AI-assisted integration and testing: yes.

[adriadam10]

Thanks for the work here. Reading the diff against the evidence in the thread, this doesn't yet fix #6582, so I can't merge it as is:

• SpirvAluEmitterMath.cpp:347 (Prove): a result is cached only if cycleGeneration didn't move while proving it. Inside a loop-carried saved EXEC mask every sub-proof crosses the Phi back edge, so none of them is cached and the loop is walked again for every use. That is the case the issue is about. Ondra97 measured it: with this commit rebased on main and the 2,048-step budget, the retained #6582 request still fails with the lane-63 refusal, and an eight-round saved-EXEC regression fails (the three-round test in ShaderMemory.cpp:2306 passes). Please extend the test to eight rounds so it pins what the PR claims (it has to fail on current main).
• Please cache by (value, proof type) as in overlordxrz-source's b76d8d31, with the cycle handling it settled on. Ondra97 published a repair branch for this PR that does that and keeps your commit and tests: https://github.com/Ondra97/AnyPS5/tree/codex/pr6645-repair-20261019 (99ed46c85). Taking it (or equivalent) fits better than the provisional generation counter.
• The branch conflicts with main: #6180 raised the budget to 2,048 and EntryLaneWalk still has budget = 512u here (SpirvAluEmitterMath.cpp:412). Please rebase and keep 2,048.
• Fixes #6582 should wait until the retained request replays successfully with your change; the CPU tests alone don't show it.

Not checked by us: the Windows/NVIDIA replay of the PRAGMATA request (relying on Ondra97's report above).

[Ondra97]

@adriadam10 I updated the repair branch to 07a36519c450807ef0f82b6f63608d7c4091d0db, synced with main b106f6f8c04cb619fb12c8b22bcedae36c6c67ac. It preserves DangerChamp's original commit and tests, with credit to overlordxrz-source for the settled proof algorithm.

The branch contains the requested eight-round saved-EXEC regression, caches by (value, proof type) with the settled cycle handling from b76d8d31, and keeps the 2,048-step budget.

I repeated the comparison on that exact main and repair head:

Check	Before (main b106f6f8c0)	After (repair 07a36519c4)
Eight-round saved-EXEC regression	Fails with the lane-63 refusal when only the regression test is added	Passes, including helper-lane rejection controls
Retained #6582 PRAGMATA request	Lane-63 refusal, exit 1	Replay succeeds, exit 0; 484,635 SPIR-V words with SPIRV-Tools validation enabled

The request is unchanged: SHA-256 a9f1f0318f46c97929ccebfffcfd8d9bebc8cbcfab132cabd4369bcc52f4a82e.

Release relinker, libs, and the affected test executables built with MinGW-w64 GCC 15.2.0. The same five focused CTests passed on main and the repair: agc_shader_entry_lane_proof_budget, agc_shader_memory, agc_shader_replay_requests, agc_shader_replay_tool, and agc_driver_pixel_wave_reduction. Both runs used ctest -V, ANYPS5_REQUIRE_VULKAN=1, ANYPS5_NO_SHADER_CACHE=1, and VK_INSTANCE_LAYERS=VK_LAYER_KHRONOS_validation. The logs confirm that layer loaded and the RTX GPU was selected with subgroup size 32; neither run reported a VUID- error or skipped test. Conventions and whitespace checks also passed.

Environment: Windows 11 Pro, Ryzen 9 7900X, 32 GB RAM, NVIDIA GeForce RTX 4070 Ti SUPER, driver 32.0.16.1742.

These results verify the captured shader failure; I did not run the title from this branch. #6645 still points to e6f33ead, so the repair needs to be integrated by the PR author before these changes and results apply to the PR head.

AI-assisted integration, testing, and write-up: yes.

[adriadam10]

Took this over, since the review points were all fixable on the branch:

• Replaced the generation counter in EntryLaneWalk with the (value, proof type) cache and settled cycle handling from Ondra97's repair branch (07a36519c4, based on overlordxrz-source's b76d8d31), keeping your commit and tests.
• The saved-EXEC regression now runs 8 rounds.
• Rebased onto main, keeping the 2,048-step budget.

Ondra97 reported the retained #6582 request passes with this algorithm; full ctest on the rebase passes; merged.