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…ecific to nx test ones
I have no damn clue why original v86 works fine and enabling nx bit actually uncovers this issue 👀
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Will windows 8 work? |
I'll check it out this weekend |
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Wow, this is great! I think Windows 7+ bootloaders require something else besides the NX bit. I couldn't start Windows 8 and 10 😢... |
In particular, I get a #GP exception |
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Alr, I'm halfway back from the dead, hope to look into it again soon 🕊️ |
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An unrelated note, having this popping out from time to time: Maybe i'll look into it later |
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Okay, 8.1 seems to boot fine. I'll check other OS later then :D |
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Booting linux seems to show some signs of PAE being either broken in this exact pull request or generally ... |
- CR4 fix: covers enabling PAE on a system that already has paging active — load_pdpte fires only if CR0.PG=1 - CR3 fix: covers writing CR3 before paging is enabled — load_pdpte fires only if CR0.PG=1
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Damn it, from windows i can't properly reset the mode for |
Revert (filter changes with mode reset) The revert did not go well
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Yep, now it should be fine - squashed the last 3 funky commits |
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@copy Can you run CI job and check whether the PR is generally fine in terms of the code-style 👀 |
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Thanks! This looks good overall. I have left some comments.
The nasmtest doesn't seem to fit in that testsuite very well. It could work better if added to kvm-unit-tests. tests/jit-paging would also make sense if Linux allows you to configure and catch NX faults.
Could you upload one or more disk images (small if possible) that exercise this feature? E.g. OSes that didn't boot before and now do.
| this.push_irq(); | ||
| break; | ||
| } | ||
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Could you send this as a separate PR?
| }, | ||
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| 0x80000008 => { | ||
| eax = 32; // physical address width |
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Should probably also set virtual address bits
| // cmpss xmm, xmm/m32 | ||
| let destination = read_xmm_f32(r); | ||
| let source: f32 = f32::from_bits(i32::cast_unsigned(source)); | ||
| let source: f32 = f32::from_bits(source as u32); |
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What's the purpose of this change? I try to avoid as because it tends to do have unintended side-effects if you got the types wrong.
| { | ||
| const array = new Array(8 + 1 + 8 + 16 + 32 + (STACK_TOP - BSS >> 2) + 3).fill(0); | ||
| array[8] = 0x1000; | ||
| return { img_name, fixture: { array, exception: "PF" } }; |
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It's unclear to me why this special case for the nx image is necessary.
| mov eax, 0x80000001 | ||
| cpuid | ||
| test edx, 1 << 20 | ||
| jz .no_nx |
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I don't think this NX check is necessary. It's gonna be enabled forever once this is merged.
| clear_tlb_code(page); | ||
| tlb_data[page as usize] = 0; | ||
| let error_code = (user as i32) << 2 | (write as i32) << 1 | present as i32; | ||
| let error_code = (is_instruction_fetch as i32) << 4 |
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This bit should only be set under certain conditions: https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-system-programming-manual-325384.pdf#page=137
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| pub unsafe fn safe_read_f32(addr: i32) -> OrPageFault<f32> { | ||
| Ok(f32::from_bits(i32::cast_unsigned(safe_read32s(addr)?))) | ||
| Ok(f32::from_bits(safe_read32s(addr)? as u32)) |
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See my other comment regarding casts
| for_writing: bool, | ||
| user: bool, | ||
| jit: bool, | ||
| is_instruction_fetch: bool, |
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Make the argument order consistent between this and translate_address.
| pub unsafe fn translate_address_fetch(address: i32) -> OrPageFault<u32> { | ||
| translate_address(address, false, *cpl == 3, false, true, true) | ||
| } | ||
| pub unsafe fn translate_address_read_jit(address: i32) -> OrPageFault<u32> { |
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This name is confusing, because historically and in the non-jit case, it means read without instruction access. The naming should be translate_address_{read,write,fetch}{,_jit}
| if side_effects { | ||
| trigger_pagefault(addr, true, for_writing, user, jit, true, false); | ||
| } | ||
| return Err(()); |
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Check if this is correct: From my understanding, if a lower table is not present, we should fault with not-present error code. Also check how the reserved bits error code should be handled.
- KVM test with and w/o JIT - Separate out the ATA_CMD_READ_LOG_EXT implementation patch - Consistent argument ordering (historically had a little issue with amount of arguments passed, as it did change dramatically in a different local branch) - Reverted cast changes proposed by IDE - Integrate NX into codegen, several renaming changes - Drop test name changes introduced before tests refactoring - And tons of other things ; - ;
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It's kind of funny how to prove that NX bit indeed is supported by booting previously unsupported OS-es |
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Make it 4 patches;
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W10 Image (though i am not sure it's okay to distribute it like that -): https://drive.google.com/file/d/1wQ4vIXJPmZTuiHGXedxGWNVdJTdp5Cda/view?usp=sharing |



That's like the second attempt at cracking this thing 🐈, and there's still some things to work on left.
The good part:
RSVDPage faults being unimplemented (which prevented the boot up of linux distributions and windows 7) - implemented though I did not test it though properly yet.The problems left (and noticed)
v86- I did notice that in release the system hangs seemingly randomly inside net2k implementation (might need a separate issue for that) - cannot reproduce rn, but I'll create a separate issue once I face it again.