Support writing bit fields via read-modify-write - #279
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Modbus has no bit write for holding registers, so a register that packs several independent controls could be read (`bits` / `shift_bits`) but never written. Writing one meant a read-modify-write loop outside the integration, which is not atomic against the coordinator's own polling. Writing a field declared with `bits` / `shift_bits` now reads the register, replaces just that field and writes it back, all inside the existing client lock - the same lock `update_device()` takes - so no poll or other write on that gateway can land in between. This does not help against a second Modbus master, but it closes the window this integration was creating itself. No new YAML syntax: `bits` / `shift_bits` on a writable control already describe exactly the field geometry the merge needs. - conversion: `merge_into_registers()` merges a descaled field into the registers read from the device, and `field_geometry()` resolves shift/mask. `_descale()` is split out of `_convert_from_decimal()` so scaled fields (`multiplier`) work. `_swap_registers` is its own inverse, so the same call un-swaps and re-swaps. - tcp_client: `_read_current_registers()` reads the whole field in one transaction rather than honouring `max_register_read` chunking - a field split across two reads could tear. A failed read raises and aborts the write; merging onto a guess would clear the field's neighbours, which is worse than not writing. - A value that does not fit its mask raises rather than truncating, for the same reason. - modbus_device_info: switches on a bit field are no longer rejected. `number` and `select` already built and only failed at write time. Coils still reject bits, where they are meaningless. - base: writable bit fields reject `signed` and `sum_scale`, whose arithmetic the merge cannot express. Deliberately not applied to sensors - tightening those would stop entities that work today from being created at all. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Fixes three claims that were wrong or unresolvable, and cuts the reasoning that served the author rather than the reader. merge_into_registers said "Modbus cannot write individual bits of a holding register". FC 0x16, Mask Write Register, does exactly that - pymodbus exposes it as mask_write_register. The read-modify-write is still the right choice, but for a different reason: FC 0x16 is optional and cannot span a multi-register field. Says that instead, in both places the claim appeared. _validate_bitfield said the merge "assumes an unsigned value and a single register span". The span half is untrue - test_merge_across_two_registers proves multi-register merges work and the validator never checks register_count - so it described a constraint that does not exist. It also called the gate "the writable control types" when ControlType.TEXT is writable and not in the tuple; the three are now named. field_geometry described its behaviour with `bits` / `shift_bits`, which are device-YAML keys, while the function takes `desc`. It now names the attributes it reads and maps them to the keys once. _read_current_registers argued from register_count being at most 4 against a default chunk of 8. Both correct, but that is why the decision was made rather than anything a caller needs, and it buried the two facts that matter: hold the lock, and a failed read abandons the write. merge_into_registers also explained that _swap_registers is its own inverse - a question about the code, not the contract. Moved to the call site. Two test docstrings: one described the case in "zone1"/"zone2" terms that appear nowhere else in the repository, the other called bits 12-19 of a 32-bit entity "the 32-bit boundary" when they straddle the boundary between the two registers.
`bits` and `shift_bits` were listed only among the read-side math operations. On a writable entity they now drive a read-modify-write, which is what lets several independent controls share one register, so the README needs to say so - including the two options that are rejected there and why. Lists all three control types the validator accepts: number, select and switch. Omitting select would have made the neighbouring `signed` / `sum_scale` restriction look inapplicable to it, when it applies.
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WalkthroughWritable register bit fields now support scaled read-modify-write operations. Validation rejects unsupported writable combinations and invalid geometry. The client reads and locks affected registers before merging changes. Tests cover preservation, errors, scaling, register order, and entity creation. ChangesWritable bit-field support
Estimated code review effort: 4 (Complex) | ~45 minutes Merge Risk: ⚪ Minimal · up to The change adds read-modify-write support for writable bit fields while preserving unrelated register values. No actionable merge-blocking risk remains at the current head beyond normal checks and review. Sequence Diagram(s)sequenceDiagram
participant Client
participant ModbusDevice
participant Conversion
Client->>ModbusDevice: Read current register span
ModbusDevice-->>Client: Return current registers
Client->>Conversion: Merge bit-field value
Conversion-->>Client: Return merged registers
Client->>ModbusDevice: Write merged registers
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In `@custom_components/modbus_local_gateway/entity_management/base.py`:
- Around line 117-124: Update the writable bit-field validation around
field_geometry() to reject negative shifts, non-positive widths, and geometries
where shift plus width exceeds 16 times the register count. Preserve the
distinction between an explicitly configured bits value of 0 and an omitted bits
setting, and ensure invalid geometry is rejected before write-time mask
calculation.
- Around line 117-124: Update the validation around the existing
conv_bits/conv_shift_bits checks to reject both bit-field options when data_type
is ModbusDataType.COIL, including unsigned read_write_boolean switches. Preserve
current validation for supported non-coil control types, and add a
device-loading regression test covering a coil configuration with bits or
shift_bits.
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README.mdcustom_components/modbus_local_gateway/conversion.pycustom_components/modbus_local_gateway/entity_management/base.pycustom_components/modbus_local_gateway/entity_management/modbus_device_info.pycustom_components/modbus_local_gateway/tcp_client.pytests/test_client.pytests/test_conversion.pytests/test_entity_management_base.pytests/test_modbus_device_info.py
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- custom_components/modbus_local_gateway/entity_management/modbus_device_info.py
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Two gaps found in review, both letting a bad config load and fail later. A writable bit field was never checked against the registers it names. With register_count 1 and shift_bits 17, field_geometry computes a width of -1 and the FIRST WRITE raises "ValueError: negative shift count" from 1 << width - so the entity loads fine and breaks when someone presses the switch. Now rejected at load with the other bit-field constraints: negative shift, non-positive width, or shift + width past the end of the span. That also means an explicit `bits: 0` is now distinguished from an omitted `bits`, in the validator and in field_geometry, and rejected. It was being read as "the whole register", which is not a plausible reading of what the author meant. Coils are the second gap. A read_write_boolean switch carrying bits or shift_bits passed validation, but write_data takes the COIL branch and ignores both - so the config silently lacked the documented behaviour. A coil is already a single bit, so the options are rejected there. The geometry checks live in their own method: adding them inline pushed _validate_bitfield past pylint's return-statement limit, and they are a separable question from the signed/sum_scale ones.
This was referenced Aug 26, 2026
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What this enables
Several devices pack independent controls into one holding register. On the heat pump I use, one
register carries a heating-enable bit and a hot-water-enable bit; another packs two zone setpoints
into the high and low byte.
Today
bits/shift_bitswork for reading such a field but not for writing, andmodbus_device_info.pyexplicitly rejects them on aswitch. So the only way to change one bit isa whole-register write — which clears every other bit in it. In my case a naive write to the
setpoint register would have silently zeroed the second zone's setpoint.
This makes
bits/shift_bitswork on a writable entity: the write becomes aread-modify-write that preserves the rest of the register.
How
Conversion.merge_into_registers()takes the register(s) currently on the device, replaces justthe field and returns the registers to write.
field_geometry()derives shift and mask frombits/shift_bits.tcp_client.write_data()performs the read and the write inside the existing clientlock, so a poll cannot interleave between them — the merge cannot be built from a stale read.
The whole span is read in one transaction rather than chunked, so a multi-register field cannot tear.
signedandsum_scaleare rejected on writable bit fields (_validate_bitfield): neither has ameaningful inverse when merging a value back into part of a register. Both remain valid on read-only
entities.
Verification
Unit tests cover geometry, merging, swap handling, the validation rules and the client path (+27
tests). Beyond that it has run against real hardware — a Kaisai/Midea heat pump behind a USR-DR134 —
since 13 August, driving six switches and a packed-byte setpoint.
Also included
merge_into_registers,field_geometryand_validate_bitfield.Follow-up from review
Bit-field geometry is now validated at load rather than failing at the first write:
shift_bits: 17on a one-register entity gave a width of
-1, and1 << -1raised only when someone pressed theswitch. Negative shifts, non-positive widths, and
shift + widthpast the register span arerejected, and an explicit
bits: 0is distinguished from an omitted one.bits/shift_bitsare also rejected on coils, which are already a single bit —write_data()takes the coil branch and ignores both, so such a config silently lacked the documented behaviour.