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Linux results for this PR and #1842 (stacked on it), on NVIDIA and AMD. Nobara 44 (Linux 7.2), GCC 16.2.1, Release. Both merge cleanly onto
CPU tests ( On RADV the new ( AI-assisted: yes |
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Other open pull requests touch the same code. Merging one will break the other, or both implement the same thing. If this one builds on them, list them in Depends on.
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Closing: no title is named that renders further with this (the description says the screen stays black at 0 fps), Conventions is red, and the new test fails on RADV with |
What
Fix resident stencil storage materialization in AnyPS5's native user-space graphics implementation. A matching R8_UINT descriptor at a resident D32S8 stencil-plane address currently throws before dispatch. It now binds a storage image seeded from the resident stencil aspect and copies actual shader writes back to that aspect. Attachment uses refresh the storage content; unchanged lookups reuse it. Depth is preserved and the recorder retains images and scratch buffers through queued transfers.
Related to #1409 and README Status's libSceAgcDriver rendering capability. Private runtime retests of this exact head on two fresh processes pass the reproduced stencil/array materialization blocker and stop at a later unsupported depth-plane storage path. This is measured execution progress; the viewport remains black at FPS 0, with no rendered scene or gameplay controls verified.
The supported path is one matching level and layer of R8_UINT through a 2D or 2D-array view, SW_64KB_Z_X, over D32S8 with DB_STENCIL_INFO.TILE_STENCIL_DISABLE set. Other depth/stencil formats, HTILE stencil, descriptor metadata, extent reinterpretation, mips, multiple layers, nonzero slices and other tiling modes throw. Unsupported depth-plane and descriptor refusals identify the resident target and descriptor fields. Raw CPU accesses to resident depth/stencil memory remain outside this backend's synchronization model. Console layout/compression behavior remains unverified.
Vulkan's depth/stencil aspect copy table defines the D32S8 stencil buffer plane as S8_UINT. The implementation transports those bytes through a device buffer between the stencil aspect and the R8 storage image; it does not reinterpret the combined depth/stencil image as a color storage image. The single-layer array path uses the correct array view type, permitted by the Vulkan image/view compatibility table. No shader instruction semantics change.
Adjacent and competing work is acknowledged: #425 implements depth storage and mentions a stencil follow-up; #454 carries depth/coherence work and its discussion reports Celegans12's local stencil patch and a planned stacked PR. This independent, narrow implementation adds an executable synthetic coherence regression on main. It has no unmerged dependency. If complementary depth retirement, clear or sampled-array work lands first, combine the resource lifetime/coherence changes and rerun this regression and complete validation. The final complete scan (2026-10-08 16:08 UTC, 345 open PRs / 50 issues) reviewed all 164 shared-file results: 104 distinct results with no captured conflict in candidate paths and 60 captured branches with textual conflicts. Current main
4b005b229e24be9ec3f185def9e59cbc03aa9e4amerges cleanly with this validated head. Its independent color/DCC, import-watch, recompiler and build advances were compared to the pinned base; no change to this defect, regression or dependency requires a rebase. Other open branches are not claimed to be mergeable together.Tested
Pinned base: 07c2405. Head: c46ecda. The identical base fixture reaches the real attachment positive control, then fails with the existing unsupported storage access at the resident stencil address. Windows 11 / MinGW GCC 15.2.0 / NVIDIA GeForce RTX 3080 (driver 616.92): the updated focused regression passed, all-target Full build and libs passed, 451/451 tests passed with no skips. Exact-head Ubuntu 24.04 / Mesa lavapipe fork CI built all targets and libs, then passed 433 tests with 23 reviewed feature skips and no failures out of 456; the stencil regression passed all three repetitions. The skipped tests require guest-wave subgroup widths, int64 atomics or conservative-rasterization features and do not cover this transport. Their precise feature cause is inferred from their source guards because CTest suppresses individual skip stdout.
The identical public fixture decodes hand-authored DB state and guest texture descriptors, constructs real Vulkan D32S8/R8 images, clears stencil to 0x11, and computes OR 0x04. Sampling and an actual stencil attachment comparison must see 0x15 while sampled depth remains 0.375. It also tests attachment-to-storage refresh, a second round trip, unchanged repeated lookup, unsupported format/layout/HTILE refusals, immediate and recorded work with typed R8UI and production-formatless storage shaders through both 2D and one-layer array views, coherence across both view types, pending clear/seed transfers and cache removal before GPU submission. An initial attachment comparison is a positive control before the unsupported base path. Generated SPIR-V remains in the build tree; no game data or proprietary shader enters the fixture.
Focused Windows commands build agc_driver_depth_stencil_storage_tests and run ^agc_driver_depth_stencil_storage$ in separate head/base trees. Final Windows validation builds all targets and libs and runs the entire Full profile. Exact-head Ubuntu fork CI builds all targets and libs and executes CTest. Windows hardware Vulkan and Ubuntu software Vulkan results are reported separately.
The test covers the changed library boundary, descriptor decode and GPU resource lifetime directly. PM4 submission and shader recompilation are unchanged and remain covered by the full existing suite; the separate private retest establishes only blocker-chain progress, and console hardware verification remains unclaimed.
Checklist
main; no other open PR implements the same functions — pinned base and final clean merge are checked, while adjacent/planned/alternative work is explicitly acknowledged above.Core and synchronization validation layers are unavailable on this Windows host (only NVIDIA Optimus/Presentation layers are installed). Behavioral GPU execution and Vulkan copy/barrier source review are provided; a clean validation-layer report is not claimed. The upstream template checker may report the truthfully unchecked combined overlap item; the workspace's explicit scenario exception preserves that finding and keeps all other gates.
Exact captured competing/adjacent heads and conflict integration
The most direct overlaps are #425 (depth storage with explicit stencil refusal/planned follow-up), #454 (last-writer retirement plus the local stencil discussion), #374/#419/#1186/#1189 (HTILE/MSAA/depth-array stacks), #1368 (versioned sampled arrays, storage aliases excluded), #1395 (draft clear/copy recognition with unresolved coverage), #1430 (sampled depth proof), and #1619 (storage-to-depth comparison copies). For each, combine aspect versions, accepted clears and view arguments without dropping retained ownership or admitting unsupported stencil states; resident storage must still refresh outside guest-memory fast proofs. Preserve the new regression and run each complementary regression plus Full Windows/exact-head Ubuntu on any integrated head. If a competing stencil implementation is published first, compare it and select one coherent implementation; this candidate does not silently stack duplicate writers.
Every captured conflict is disclosed below. Renderer paths are relative to
core/libs/prx/libSceAgcDriver/Graphics/; debt meansdocs/dev/TechnicalDebt.md. For independent older branches, reconcile inherited renderer context with current main while retaining the resident transfer branches, append independent tests and preserve both accurate debt entries. The formatter/debt-rewrite proposals require preserving the full semantic change and limitations if upstream selects those policies first. These plans do not assert the conflicts are already resolved.25bc2098690df4a7738af6c8094e2f23b221ed78src/DepthSurface.cpp,src/Texture.cpp,debtb8ae1f4b7f35a9b12815803c90c2c67d57c04e20include/State.hpp,src/DepthSurface.cpp,src/State.cpp993ccfadd04f8b90376c29b36e830bbae058b9d6src/Texture.cpp,debtfb6999abc42ec12ef7ea48cbf95a9800c7282bc5include/State.hpp,src/DepthSurface.cpp,src/State.cpp,src/Texture.cpp,debt5c5b106dce37f6dd8081f1f8947039a3f3fe1c14src/Texture.cpp,debt62b1e55215ef9936a1df12c2a23ef29725c9b17einclude/DepthSurface.hpp,include/State.hpp,include/Texture.hpp,src/DepthSurface.cpp,src/ShaderResources.cpp,src/State.cpp,src/Texture.cpp31d47639e62acadd16ab2e3f05daa1bd3e18e748src/Texture.cpp,debt8e5ba4783668f25665904774b37d3ef915b2a03finclude/DepthSurface.hpp,include/State.hpp,include/Texture.hpp,src/DepthSurface.cpp,src/ShaderResources.cpp,src/State.cpp,src/Texture.cpp,debt2a3a2a7cb6dcdd9fb8066c930640cadaf66f2ad0src/Texture.cpp,debt43eba76feeb8facb7d95e892a0aae1636b077f2fsrc/Texture.cpp,debt7a894554de838d6bca053ed0037adb24d9c71582src/Texture.cpp,debt633b8f39e9e52e93f6fac6fce6ea4238674036d8src/Texture.cpp,debt27aa6e1619812f7379cf8b7ba9a2dba07455bfb3src/Texture.cpp,debt03bf25f0bb6377eca6ad111e95605b6a1733011fsrc/Texture.cpp,debt32a7c349ad3224863f89fc5275604fcf00db0d4bsrc/Texture.cpp,debt7857d689fa8485f51a227277e1b308916202979bsrc/Texture.cpp,debt74870921d94811133d9dba1cf5a1da914edbd4d9src/Texture.cpp,debtd86365c7e3652f0c676a772514b1c129c1400685src/Texture.cpp,debt7f5f456585e9a112ac468726c43df636d711a1d8debtf9db6c15838002f4a000e95ba92a7d4a33db9d31include/DepthSurface.hpp,include/Texture.hpp,src/DepthSurface.cpp,src/ShaderResources.cpp,src/Texture.cpp,debt6d380536ede30d889d1d1cafba5929fb10d464c7src/Texture.cpp,debt41b87057b519e814c882917919232ebc20b83d0fsrc/Texture.cpp,debt1761a5d86133d52b4af12825d6fa9406d202bfc1src/Texture.cpp,debtfd0ddc6a6243e7ff50e6c4b5189d4673aa36dd4ainclude/DepthSurface.hpp,include/State.hpp,include/Texture.hpp,src/DepthSurface.cpp,src/ShaderResources.cpp,src/State.cpp,src/Texture.cpp13c1cbf92d040d55748357ef2d6bbdf7e164c8fdinclude/State.hpp,src/DepthSurface.cpp,src/State.cpp,src/Texture.cpp,debt081440799de5a6adf9cf596c50ccb48cb7a8e111src/Texture.cpp,debtb5be7a11458fe379f004610eeb341bdddb367eb1src/Texture.cpp,debt541d1748c90df76013ff9e13d0769b1cd8ba6b8bsrc/Texture.cpp,debtc88e9af64132320456eade1826540879174fa79dsrc/Texture.cpp,debt2a2141fc57ea62b6f17211e9595341ec41570794debte66af07498a40f1b287cd7763270d1a9d485dea2src/Texture.cpp,debtf501c142592bad9e851ac0eb7524a25a0858a8a2debt349781da4109531546dde35e582d0a33b855ce7edebt398077671a47c78e3237ff79e621af0be9810e10debtc9e08e60ade60449479a7e431d6a700cd6636758debt5afe2d4df2d659181b6f21fb17c786cca166b40fdebt71d4800ef400d63ea55f867c45b2511612659b8fsrc/Texture.cpp,debt1f8e6b23a743790864c6dca8b4ac8bccc9682981debt63763c6a0ada57b7bdd1d24dc50e8bf2ba517923debtc6ba437eec3f5518c89a0656a1bc58a24b62a07esrc/Texture.cpp,debt6529493ab11fbeea6102b8e5c4cc315e4847e3b2debtcc32a55fd72510e1dc35bef3458ffc2d0f094f24debtaf64ea997dc405a590e9c410198f7ea56473fcf6debta99c4a0bfbb8f783b64597ebf2fd76b58f402a3csrc/Texture.cpp,debt202d5f5746c8af1172b5a82f022b4dd84741d7eadebt335f703408db24fbcfde52e2054d3627a7c504d7debt04bc4e5fcb51e357a361dc0173e1860b5efa1120debt6aa7e9c96694a4314ddf146327079113cefa8245debt88076041c224ddb652c565f5bf206ca9f4740a36debt85593a17a8e07baf3a1fac487f234374308c4b64debtf74fa3d6aaa2a8675ee0642ec8d9bf97af39618adebt80979c992b51585a1b65364b761d75f0220bc049include/Texture.hpp,src/DepthSurface.cpp,src/Texture.cpp,debt70b4d2de4b4e9ed4c27259f4ef75f0e9f7b366e0debtcedec6e1d5765800c2ffb039d8675d864d27cd57include/Texture.hpp,src/DepthSurface.cpp,src/Texture.cpp,debt965f018048f3cee686a37ae61b138a396dca9d55src/DepthSurface.cpp3d896a2a69c95395e34f60f9aa8fee5ff6c34997debtd93a8376e33b706f0520db1d0763db7c1afb7399debt7f0951c61d66878df37f43f5adf04b6856a440d5debta1ece68929c30c4ed7ccad5d2c7ad1aae21790dcdebt1c0a5b6c8ebd1e4ca538510daca2c527a8f455ccinclude/Texture.hpp